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path: root/drivers/gpu/nvgpu/common/vbios
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Diffstat (limited to 'drivers/gpu/nvgpu/common/vbios')
-rw-r--r--drivers/gpu/nvgpu/common/vbios/bios.c53
1 files changed, 52 insertions, 1 deletions
diff --git a/drivers/gpu/nvgpu/common/vbios/bios.c b/drivers/gpu/nvgpu/common/vbios/bios.c
index fa700a66..52c0a798 100644
--- a/drivers/gpu/nvgpu/common/vbios/bios.c
+++ b/drivers/gpu/nvgpu/common/vbios/bios.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * Copyright (c) 2015-2017, NVIDIA CORPORATION. All rights reserved. 2 * Copyright (c) 2015-2018, NVIDIA CORPORATION. All rights reserved.
3 * 3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a 4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"), 5 * copy of this software and associated documentation files (the "Software"),
@@ -74,6 +74,22 @@ struct bit {
74#define TOKEN_ID_VIRT_PTRS 0x56 74#define TOKEN_ID_VIRT_PTRS 0x56
75#define TOKEN_ID_MEMORY_PTRS 0x4D 75#define TOKEN_ID_MEMORY_PTRS 0x4D
76 76
77#define NVLINK_CONFIG_DATA_HDR_VER_10 0x1
78#define NVLINK_CONFIG_DATA_HDR_10_SIZE 16
79#define NVLINK_CONFIG_DATA_HDR_11_SIZE 17
80#define NVLINK_CONFIG_DATA_HDR_12_SIZE 21
81
82struct nvlink_config_data_hdr_v1 {
83 u8 version;
84 u8 hdr_size;
85 u16 rsvd0;
86 u32 link_disable_mask;
87 u32 link_mode_mask;
88 u32 link_refclk_mask;
89 u8 train_at_boot;
90 u32 ac_coupling_mask;
91} __packed;
92
77#define MEMORY_PTRS_V1 1 93#define MEMORY_PTRS_V1 1
78#define MEMORY_PTRS_V2 2 94#define MEMORY_PTRS_V2 2
79 95
@@ -369,6 +385,41 @@ static void nvgpu_bios_parse_nvinit_ptrs(struct gk20a *g, int offset)
369 g->bios.bootscripts = &g->bios.data[nvinit_ptrs.bootscripts_ptr]; 385 g->bios.bootscripts = &g->bios.data[nvinit_ptrs.bootscripts_ptr];
370 g->bios.bootscripts_size = nvinit_ptrs.bootscripts_size; 386 g->bios.bootscripts_size = nvinit_ptrs.bootscripts_size;
371 g->bios.condition_table_ptr = nvinit_ptrs.condition_table_ptr; 387 g->bios.condition_table_ptr = nvinit_ptrs.condition_table_ptr;
388 g->bios.nvlink_config_data_offset = nvinit_ptrs.nvlink_config_data_ptr;
389}
390
391u32 nvgpu_bios_get_nvlink_config_data(struct gk20a *g)
392{
393 struct nvlink_config_data_hdr_v1 config;
394
395 if (g->bios.nvlink_config_data_offset == 0)
396 return -EINVAL;
397
398 memcpy(&config, &g->bios.data[g->bios.nvlink_config_data_offset],
399 sizeof(config));
400
401 if (config.version != NVLINK_CONFIG_DATA_HDR_VER_10) {
402 nvgpu_err(g, "unsupported nvlink bios version: 0x%x",
403 config.version);
404 return -EINVAL;
405 }
406
407 switch (config.hdr_size) {
408 case NVLINK_CONFIG_DATA_HDR_12_SIZE:
409 g->nvlink.ac_coupling_mask = config.ac_coupling_mask;
410 case NVLINK_CONFIG_DATA_HDR_11_SIZE:
411 g->nvlink.train_at_boot = config.train_at_boot;
412 case NVLINK_CONFIG_DATA_HDR_10_SIZE:
413 g->nvlink.link_disable_mask = config.link_disable_mask;
414 g->nvlink.link_mode_mask = config.link_mode_mask;
415 g->nvlink.link_refclk_mask = config.link_refclk_mask;
416 break;
417 default:
418 nvgpu_err(g, "invalid nvlink bios config size");
419 return -EINVAL;
420 }
421
422 return 0;
372} 423}
373 424
374static void nvgpu_bios_parse_memory_ptrs(struct gk20a *g, int offset, u8 version) 425static void nvgpu_bios_parse_memory_ptrs(struct gk20a *g, int offset, u8 version)