diff options
Diffstat (limited to 'drivers/gpu/nvgpu/common/ptimer')
-rw-r--r-- | drivers/gpu/nvgpu/common/ptimer/ptimer.c | 5 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/common/ptimer/ptimer_gk20a.c | 6 |
2 files changed, 7 insertions, 4 deletions
diff --git a/drivers/gpu/nvgpu/common/ptimer/ptimer.c b/drivers/gpu/nvgpu/common/ptimer/ptimer.c index d5f9470d..3f3a5f9b 100644 --- a/drivers/gpu/nvgpu/common/ptimer/ptimer.c +++ b/drivers/gpu/nvgpu/common/ptimer/ptimer.c | |||
@@ -1,5 +1,5 @@ | |||
1 | /* | 1 | /* |
2 | * Copyright (c) 2017, NVIDIA CORPORATION. All rights reserved. | 2 | * Copyright (c) 2017-2018, NVIDIA CORPORATION. All rights reserved. |
3 | * | 3 | * |
4 | * Permission is hereby granted, free of charge, to any person obtaining a | 4 | * Permission is hereby granted, free of charge, to any person obtaining a |
5 | * copy of this software and associated documentation files (the "Software"), | 5 | * copy of this software and associated documentation files (the "Software"), |
@@ -39,8 +39,9 @@ int nvgpu_get_timestamps_zipper(struct gk20a *g, | |||
39 | 39 | ||
40 | for (i = 0; i < count; i++) { | 40 | for (i = 0; i < count; i++) { |
41 | err = g->ops.ptimer.read_ptimer(g, &samples[i].gpu_timestamp); | 41 | err = g->ops.ptimer.read_ptimer(g, &samples[i].gpu_timestamp); |
42 | if (err) | 42 | if (err) { |
43 | return err; | 43 | return err; |
44 | } | ||
44 | 45 | ||
45 | samples[i].cpu_timestamp = nvgpu_hr_timestamp(); | 46 | samples[i].cpu_timestamp = nvgpu_hr_timestamp(); |
46 | } | 47 | } |
diff --git a/drivers/gpu/nvgpu/common/ptimer/ptimer_gk20a.c b/drivers/gpu/nvgpu/common/ptimer/ptimer_gk20a.c index 0b3188ee..a9c971df 100644 --- a/drivers/gpu/nvgpu/common/ptimer/ptimer_gk20a.c +++ b/drivers/gpu/nvgpu/common/ptimer/ptimer_gk20a.c | |||
@@ -54,9 +54,10 @@ void gk20a_ptimer_isr(struct gk20a *g) | |||
54 | 54 | ||
55 | if (fecs_errcode) { | 55 | if (fecs_errcode) { |
56 | nvgpu_err(g, "FECS_ERRCODE 0x%08x", fecs_errcode); | 56 | nvgpu_err(g, "FECS_ERRCODE 0x%08x", fecs_errcode); |
57 | if (g->ops.priv_ring.decode_error_code) | 57 | if (g->ops.priv_ring.decode_error_code) { |
58 | g->ops.priv_ring.decode_error_code(g, | 58 | g->ops.priv_ring.decode_error_code(g, |
59 | fecs_errcode); | 59 | fecs_errcode); |
60 | } | ||
60 | } | 61 | } |
61 | } | 62 | } |
62 | 63 | ||
@@ -66,8 +67,9 @@ int gk20a_read_ptimer(struct gk20a *g, u64 *value) | |||
66 | unsigned int i = 0; | 67 | unsigned int i = 0; |
67 | u32 gpu_timestamp_hi_prev = 0; | 68 | u32 gpu_timestamp_hi_prev = 0; |
68 | 69 | ||
69 | if (!value) | 70 | if (!value) { |
70 | return -EINVAL; | 71 | return -EINVAL; |
72 | } | ||
71 | 73 | ||
72 | /* Note. The GPU nanosecond timer consists of two 32-bit | 74 | /* Note. The GPU nanosecond timer consists of two 32-bit |
73 | * registers (high & low). To detect a possible low register | 75 | * registers (high & low). To detect a possible low register |