diff options
Diffstat (limited to 'drivers/gpu/nvgpu/common/pramin.c')
-rw-r--r-- | drivers/gpu/nvgpu/common/pramin.c | 27 |
1 files changed, 15 insertions, 12 deletions
diff --git a/drivers/gpu/nvgpu/common/pramin.c b/drivers/gpu/nvgpu/common/pramin.c index 425bfdb4..bb7d930e 100644 --- a/drivers/gpu/nvgpu/common/pramin.c +++ b/drivers/gpu/nvgpu/common/pramin.c | |||
@@ -84,37 +84,40 @@ void nvgpu_pramin_access_batched(struct gk20a *g, struct nvgpu_mem *mem, | |||
84 | u32 offset, u32 size, pramin_access_batch_fn loop, u32 **arg) | 84 | u32 offset, u32 size, pramin_access_batch_fn loop, u32 **arg) |
85 | { | 85 | { |
86 | struct nvgpu_page_alloc *alloc = NULL; | 86 | struct nvgpu_page_alloc *alloc = NULL; |
87 | struct page_alloc_chunk *chunk = NULL; | 87 | struct nvgpu_mem_sgl *sgl; |
88 | u32 byteoff, start_reg, until_end, n; | 88 | u32 byteoff, start_reg, until_end, n; |
89 | 89 | ||
90 | alloc = get_vidmem_page_alloc(mem->priv.sgt->sgl); | 90 | alloc = get_vidmem_page_alloc(mem->priv.sgt->sgl); |
91 | nvgpu_list_for_each_entry(chunk, &alloc->alloc_chunks, | 91 | sgl = alloc->sgl; |
92 | page_alloc_chunk, list_entry) { | 92 | while (sgl) { |
93 | if (offset >= chunk->length) | 93 | if (offset >= nvgpu_mem_sgl_length(sgl)) { |
94 | offset -= chunk->length; | 94 | offset -= nvgpu_mem_sgl_length(sgl); |
95 | else | 95 | sgl = sgl->next; |
96 | } else { | ||
96 | break; | 97 | break; |
98 | } | ||
97 | } | 99 | } |
98 | 100 | ||
99 | while (size) { | 101 | while (size) { |
100 | byteoff = g->ops.pramin.enter(g, mem, chunk, | 102 | u32 sgl_len = (u32)nvgpu_mem_sgl_length(sgl); |
103 | |||
104 | byteoff = g->ops.pramin.enter(g, mem, sgl, | ||
101 | offset / sizeof(u32)); | 105 | offset / sizeof(u32)); |
102 | start_reg = g->ops.pramin.data032_r(byteoff / sizeof(u32)); | 106 | start_reg = g->ops.pramin.data032_r(byteoff / sizeof(u32)); |
103 | until_end = SZ_1M - (byteoff & (SZ_1M - 1)); | 107 | until_end = SZ_1M - (byteoff & (SZ_1M - 1)); |
104 | 108 | ||
105 | n = min3(size, until_end, (u32)(chunk->length - offset)); | 109 | n = min3(size, until_end, (u32)(sgl_len - offset)); |
106 | 110 | ||
107 | loop(g, start_reg, n / sizeof(u32), arg); | 111 | loop(g, start_reg, n / sizeof(u32), arg); |
108 | 112 | ||
109 | /* read back to synchronize accesses */ | 113 | /* read back to synchronize accesses */ |
110 | gk20a_readl(g, start_reg); | 114 | gk20a_readl(g, start_reg); |
111 | g->ops.pramin.exit(g, mem, chunk); | 115 | g->ops.pramin.exit(g, mem, sgl); |
112 | 116 | ||
113 | size -= n; | 117 | size -= n; |
114 | 118 | ||
115 | if (n == (chunk->length - offset)) { | 119 | if (n == (sgl_len - offset)) { |
116 | chunk = nvgpu_list_next_entry(chunk, page_alloc_chunk, | 120 | sgl = nvgpu_mem_sgl_next(sgl); |
117 | list_entry); | ||
118 | offset = 0; | 121 | offset = 0; |
119 | } else { | 122 | } else { |
120 | offset += n; | 123 | offset += n; |