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Diffstat (limited to 'drivers/gpu/nvgpu/common/pmu/pmu_debug.c')
-rw-r--r--drivers/gpu/nvgpu/common/pmu/pmu_debug.c57
1 files changed, 57 insertions, 0 deletions
diff --git a/drivers/gpu/nvgpu/common/pmu/pmu_debug.c b/drivers/gpu/nvgpu/common/pmu/pmu_debug.c
new file mode 100644
index 00000000..6ad82ca8
--- /dev/null
+++ b/drivers/gpu/nvgpu/common/pmu/pmu_debug.c
@@ -0,0 +1,57 @@
1/*
2 * Copyright (c) 2016-2017, NVIDIA CORPORATION. All rights reserved.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
18 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
19 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
20 * DEALINGS IN THE SOFTWARE.
21 */
22
23#include <nvgpu/pmu.h>
24#include <nvgpu/log.h>
25#include <nvgpu/timers.h>
26#include <nvgpu/kmem.h>
27#include <nvgpu/dma.h>
28#include <nvgpu/pmuif/nvgpu_gpmu_cmdif.h>
29
30#include "gk20a/gk20a.h"
31
32void nvgpu_pmu_dump_elpg_stats(struct nvgpu_pmu *pmu)
33{
34 struct gk20a *g = pmu->g;
35
36 /* Print PG stats */
37 nvgpu_err(g, "Print PG stats");
38 nvgpu_flcn_print_dmem(pmu->flcn,
39 pmu->stat_dmem_offset[PMU_PG_ELPG_ENGINE_ID_GRAPHICS],
40 sizeof(struct pmu_pg_stats_v2));
41
42 gk20a_pmu_dump_elpg_stats(pmu);
43}
44
45void nvgpu_pmu_dump_falcon_stats(struct nvgpu_pmu *pmu)
46{
47 struct gk20a *g = pmu->g;
48
49 nvgpu_flcn_dump_stats(pmu->flcn);
50 gk20a_pmu_dump_falcon_stats(pmu);
51
52 nvgpu_err(g, "pmu state: %d", pmu->pmu_state);
53 nvgpu_err(g, "elpg state: %d", pmu->elpg_stat);
54
55 /* PMU may crash due to FECS crash. Dump FECS status */
56 gk20a_fecs_dump_falcon_stats(g);
57}