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Diffstat (limited to 'drivers/gpu/nvgpu/common/pmu/pmu.c')
-rw-r--r--drivers/gpu/nvgpu/common/pmu/pmu.c8
1 files changed, 5 insertions, 3 deletions
diff --git a/drivers/gpu/nvgpu/common/pmu/pmu.c b/drivers/gpu/nvgpu/common/pmu/pmu.c
index 327f67d3..2dcadb48 100644
--- a/drivers/gpu/nvgpu/common/pmu/pmu.c
+++ b/drivers/gpu/nvgpu/common/pmu/pmu.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * Copyright (c) 2017, NVIDIA CORPORATION. All rights reserved. 2 * Copyright (c) 2017-2018, NVIDIA CORPORATION. All rights reserved.
3 * 3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a 4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"), 5 * copy of this software and associated documentation files (the "Software"),
@@ -358,8 +358,9 @@ int nvgpu_pmu_process_init_msg(struct nvgpu_pmu *pmu,
358 } 358 }
359 } 359 }
360 360
361 for (i = 0; i < PMU_QUEUE_COUNT; i++) 361 for (i = 0; i < PMU_QUEUE_COUNT; i++) {
362 nvgpu_pmu_queue_init(pmu, i, init); 362 nvgpu_pmu_queue_init(pmu, i, init);
363 }
363 364
364 if (!nvgpu_alloc_initialized(&pmu->dmem)) { 365 if (!nvgpu_alloc_initialized(&pmu->dmem)) {
365 /* Align start and end addresses */ 366 /* Align start and end addresses */
@@ -480,8 +481,9 @@ static int nvgpu_pg_init_task(void *arg)
480 481
481 } 482 }
482 483
483 while (!nvgpu_thread_should_stop(&pg_init->state_task)) 484 while (!nvgpu_thread_should_stop(&pg_init->state_task)) {
484 nvgpu_usleep_range(5000, 5100); 485 nvgpu_usleep_range(5000, 5100);
486 }
485 487
486 nvgpu_log_fn(g, "thread exit"); 488 nvgpu_log_fn(g, "thread exit");
487 489