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path: root/drivers/gpu/nvgpu/common/mm/pd_cache.c
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Diffstat (limited to 'drivers/gpu/nvgpu/common/mm/pd_cache.c')
-rw-r--r--drivers/gpu/nvgpu/common/mm/pd_cache.c14
1 files changed, 7 insertions, 7 deletions
diff --git a/drivers/gpu/nvgpu/common/mm/pd_cache.c b/drivers/gpu/nvgpu/common/mm/pd_cache.c
index db48d168..335ef360 100644
--- a/drivers/gpu/nvgpu/common/mm/pd_cache.c
+++ b/drivers/gpu/nvgpu/common/mm/pd_cache.c
@@ -76,20 +76,20 @@
76 76
77static u32 nvgpu_pd_cache_nr(u32 bytes) 77static u32 nvgpu_pd_cache_nr(u32 bytes)
78{ 78{
79 return ilog2(bytes >> (NVGPU_PD_CACHE_MIN_SHIFT - 1)); 79 return ilog2(bytes >> (NVGPU_PD_CACHE_MIN_SHIFT - 1U));
80} 80}
81 81
82static u32 nvgpu_pd_cache_get_mask(struct nvgpu_pd_mem_entry *pentry) 82static u32 nvgpu_pd_cache_get_mask(struct nvgpu_pd_mem_entry *pentry)
83{ 83{
84 u32 mask_offset = 1 << (PAGE_SIZE / pentry->pd_size); 84 u32 mask_offset = 1 << (PAGE_SIZE / pentry->pd_size);
85 85
86 return mask_offset - 1; 86 return mask_offset - 1U;
87} 87}
88 88
89int nvgpu_pd_cache_init(struct gk20a *g) 89int nvgpu_pd_cache_init(struct gk20a *g)
90{ 90{
91 struct nvgpu_pd_cache *cache; 91 struct nvgpu_pd_cache *cache;
92 int i; 92 u32 i;
93 93
94 /* 94 /*
95 * This gets called from finalize_poweron() so we need to make sure we 95 * This gets called from finalize_poweron() so we need to make sure we
@@ -105,7 +105,7 @@ int nvgpu_pd_cache_init(struct gk20a *g)
105 return -ENOMEM; 105 return -ENOMEM;
106 } 106 }
107 107
108 for (i = 0; i < NVGPU_PD_CACHE_COUNT; i++) { 108 for (i = 0U; i < NVGPU_PD_CACHE_COUNT; i++) {
109 nvgpu_init_list_node(&cache->full[i]); 109 nvgpu_init_list_node(&cache->full[i]);
110 nvgpu_init_list_node(&cache->partial[i]); 110 nvgpu_init_list_node(&cache->partial[i]);
111 } 111 }
@@ -121,14 +121,14 @@ int nvgpu_pd_cache_init(struct gk20a *g)
121 121
122void nvgpu_pd_cache_fini(struct gk20a *g) 122void nvgpu_pd_cache_fini(struct gk20a *g)
123{ 123{
124 int i; 124 u32 i;
125 struct nvgpu_pd_cache *cache = g->mm.pd_cache; 125 struct nvgpu_pd_cache *cache = g->mm.pd_cache;
126 126
127 if (!cache) { 127 if (!cache) {
128 return; 128 return;
129 } 129 }
130 130
131 for (i = 0; i < NVGPU_PD_CACHE_COUNT; i++) { 131 for (i = 0U; i < NVGPU_PD_CACHE_COUNT; i++) {
132 WARN_ON(!nvgpu_list_empty(&cache->full[i])); 132 WARN_ON(!nvgpu_list_empty(&cache->full[i]));
133 WARN_ON(!nvgpu_list_empty(&cache->partial[i])); 133 WARN_ON(!nvgpu_list_empty(&cache->partial[i]));
134 } 134 }
@@ -305,7 +305,7 @@ static int nvgpu_pd_cache_alloc(struct gk20a *g, struct nvgpu_pd_cache *cache,
305 305
306 pd_dbg(g, "PD-Alloc [C] %u bytes", bytes); 306 pd_dbg(g, "PD-Alloc [C] %u bytes", bytes);
307 307
308 if (bytes & (bytes - 1) || 308 if (bytes & (bytes - 1U) ||
309 (bytes >= PAGE_SIZE || 309 (bytes >= PAGE_SIZE ||
310 bytes < NVGPU_PD_CACHE_MIN)) { 310 bytes < NVGPU_PD_CACHE_MIN)) {
311 pd_dbg(g, "PD-Alloc [C] Invalid (bytes=%u)!", bytes); 311 pd_dbg(g, "PD-Alloc [C] Invalid (bytes=%u)!", bytes);