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-rw-r--r--drivers/gpu/nvgpu/common/linux/cde.c10
-rw-r--r--drivers/gpu/nvgpu/common/linux/cde_gm20b.c64
-rw-r--r--drivers/gpu/nvgpu/common/linux/cde_gm20b.h32
-rw-r--r--drivers/gpu/nvgpu/common/linux/cde_gp10b.c160
-rw-r--r--drivers/gpu/nvgpu/common/linux/cde_gp10b.h32
-rw-r--r--drivers/gpu/nvgpu/common/linux/module.c26
-rw-r--r--drivers/gpu/nvgpu/common/linux/os_linux.h18
7 files changed, 337 insertions, 5 deletions
diff --git a/drivers/gpu/nvgpu/common/linux/cde.c b/drivers/gpu/nvgpu/common/linux/cde.c
index 2832408d..c3a9b770 100644
--- a/drivers/gpu/nvgpu/common/linux/cde.c
+++ b/drivers/gpu/nvgpu/common/linux/cde.c
@@ -1068,8 +1068,8 @@ __releases(&l->cde_app->mutex)
1068 } 1068 }
1069 1069
1070 if (scatterbuffer_byte_offset && 1070 if (scatterbuffer_byte_offset &&
1071 g->ops.cde.need_scatter_buffer && 1071 l->ops.cde.need_scatter_buffer &&
1072 g->ops.cde.need_scatter_buffer(g)) { 1072 l->ops.cde.need_scatter_buffer(g)) {
1073 struct sg_table *sgt; 1073 struct sg_table *sgt;
1074 void *scatter_buffer; 1074 void *scatter_buffer;
1075 1075
@@ -1092,7 +1092,7 @@ __releases(&l->cde_app->mutex)
1092 err = -EINVAL; 1092 err = -EINVAL;
1093 goto exit_unmap_surface; 1093 goto exit_unmap_surface;
1094 } else { 1094 } else {
1095 err = g->ops.cde.populate_scatter_buffer(g, sgt, 1095 err = l->ops.cde.populate_scatter_buffer(g, sgt,
1096 compbits_byte_offset, scatter_buffer, 1096 compbits_byte_offset, scatter_buffer,
1097 scatterbuffer_size); 1097 scatterbuffer_size);
1098 WARN_ON(err); 1098 WARN_ON(err);
@@ -1463,8 +1463,8 @@ static int gk20a_buffer_convert_gpu_to_cde_v1(
1463 int hprog = -1; 1463 int hprog = -1;
1464 int vprog = -1; 1464 int vprog = -1;
1465 1465
1466 if (g->ops.cde.get_program_numbers) 1466 if (l->ops.cde.get_program_numbers)
1467 g->ops.cde.get_program_numbers(g, block_height_log2, 1467 l->ops.cde.get_program_numbers(g, block_height_log2,
1468 l->cde_app.shader_parameter, 1468 l->cde_app.shader_parameter,
1469 &hprog, &vprog); 1469 &hprog, &vprog);
1470 else { 1470 else {
diff --git a/drivers/gpu/nvgpu/common/linux/cde_gm20b.c b/drivers/gpu/nvgpu/common/linux/cde_gm20b.c
new file mode 100644
index 00000000..1cd15c54
--- /dev/null
+++ b/drivers/gpu/nvgpu/common/linux/cde_gm20b.c
@@ -0,0 +1,64 @@
1/*
2 * GM20B CDE
3 *
4 * Copyright (c) 2015-2017, NVIDIA CORPORATION. All rights reserved.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
22 * DEALINGS IN THE SOFTWARE.
23 */
24
25#include "gk20a/gk20a.h"
26#include "cde_gm20b.h"
27
28enum programs {
29 PROG_HPASS = 0,
30 PROG_VPASS_LARGE = 1,
31 PROG_VPASS_SMALL = 2,
32 PROG_HPASS_DEBUG = 3,
33 PROG_VPASS_LARGE_DEBUG = 4,
34 PROG_VPASS_SMALL_DEBUG = 5,
35 PROG_PASSTHROUGH = 6,
36};
37
38static void gm20b_cde_get_program_numbers(struct gk20a *g,
39 u32 block_height_log2,
40 u32 shader_parameter,
41 int *hprog_out, int *vprog_out)
42{
43 int hprog = PROG_HPASS;
44 int vprog = (block_height_log2 >= 2) ?
45 PROG_VPASS_LARGE : PROG_VPASS_SMALL;
46 if (shader_parameter == 1) {
47 hprog = PROG_PASSTHROUGH;
48 vprog = PROG_PASSTHROUGH;
49 } else if (shader_parameter == 2) {
50 hprog = PROG_HPASS_DEBUG;
51 vprog = (block_height_log2 >= 2) ?
52 PROG_VPASS_LARGE_DEBUG :
53 PROG_VPASS_SMALL_DEBUG;
54 }
55
56 *hprog_out = hprog;
57 *vprog_out = vprog;
58}
59
60struct nvgpu_os_linux_ops gm20b_cde_ops = {
61 .cde = {
62 .get_program_numbers = gm20b_cde_get_program_numbers,
63 },
64};
diff --git a/drivers/gpu/nvgpu/common/linux/cde_gm20b.h b/drivers/gpu/nvgpu/common/linux/cde_gm20b.h
new file mode 100644
index 00000000..640d6ab6
--- /dev/null
+++ b/drivers/gpu/nvgpu/common/linux/cde_gm20b.h
@@ -0,0 +1,32 @@
1/*
2 * GM20B CDE
3 *
4 * Copyright (c) 2015-2017, NVIDIA CORPORATION. All rights reserved.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
22 * DEALINGS IN THE SOFTWARE.
23 */
24
25#ifndef _NVHOST_GM20B_CDE
26#define _NVHOST_GM20B_CDE
27
28#include "os_linux.h"
29
30extern struct nvgpu_os_linux_ops gm20b_cde_ops;
31
32#endif
diff --git a/drivers/gpu/nvgpu/common/linux/cde_gp10b.c b/drivers/gpu/nvgpu/common/linux/cde_gp10b.c
new file mode 100644
index 00000000..ffae6e34
--- /dev/null
+++ b/drivers/gpu/nvgpu/common/linux/cde_gp10b.c
@@ -0,0 +1,160 @@
1/*
2 * GP10B CDE
3 *
4 * Copyright (c) 2015-2017, NVIDIA CORPORATION. All rights reserved.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
22 * DEALINGS IN THE SOFTWARE.
23 */
24
25#include "gk20a/gk20a.h"
26#include "cde_gp10b.h"
27
28#include <nvgpu/log.h>
29
30enum gp10b_programs {
31 GP10B_PROG_HPASS = 0,
32 GP10B_PROG_HPASS_4K = 1,
33 GP10B_PROG_VPASS = 2,
34 GP10B_PROG_VPASS_4K = 3,
35 GP10B_PROG_HPASS_DEBUG = 4,
36 GP10B_PROG_HPASS_4K_DEBUG = 5,
37 GP10B_PROG_VPASS_DEBUG = 6,
38 GP10B_PROG_VPASS_4K_DEBUG = 7,
39 GP10B_PROG_PASSTHROUGH = 8,
40};
41
42void gp10b_cde_get_program_numbers(struct gk20a *g,
43 u32 block_height_log2,
44 u32 shader_parameter,
45 int *hprog_out, int *vprog_out)
46{
47 int hprog, vprog;
48
49 if (shader_parameter == 1) {
50 hprog = GP10B_PROG_PASSTHROUGH;
51 vprog = GP10B_PROG_PASSTHROUGH;
52 } else {
53 hprog = GP10B_PROG_HPASS;
54 vprog = GP10B_PROG_VPASS;
55 if (shader_parameter == 2) {
56 hprog = GP10B_PROG_HPASS_DEBUG;
57 vprog = GP10B_PROG_VPASS_DEBUG;
58 }
59 if (g->mm.bypass_smmu) {
60 if (!g->mm.disable_bigpage) {
61 nvgpu_warn(g,
62 "when bypass_smmu is 1, disable_bigpage must be 1 too");
63 }
64 hprog |= 1;
65 vprog |= 1;
66 }
67 }
68
69 *hprog_out = hprog;
70 *vprog_out = vprog;
71}
72
73bool gp10b_need_scatter_buffer(struct gk20a *g)
74{
75 return g->mm.bypass_smmu;
76}
77
78static u8 parity(u32 a)
79{
80 a ^= a>>16u;
81 a ^= a>>8u;
82 a ^= a>>4u;
83 a &= 0xfu;
84 return (0x6996u >> a) & 1u;
85}
86
87int gp10b_populate_scatter_buffer(struct gk20a *g,
88 struct sg_table *sgt,
89 size_t surface_size,
90 void *scatter_buffer_ptr,
91 size_t scatter_buffer_size)
92{
93 /* map scatter buffer to CPU VA and fill it */
94 const u32 page_size_log2 = 12;
95 const u32 page_size = 1 << page_size_log2;
96 const u32 page_size_shift = page_size_log2 - 7u;
97
98 /* 0011 1111 1111 1111 1111 1110 0100 1000 */
99 const u32 getSliceMaskGP10B = 0x3ffffe48;
100 u8 *scatter_buffer = scatter_buffer_ptr;
101
102 size_t i;
103 struct scatterlist *sg = NULL;
104 u8 d = 0;
105 size_t page = 0;
106 size_t pages_left;
107
108 surface_size = round_up(surface_size, page_size);
109
110 pages_left = surface_size >> page_size_log2;
111 if ((pages_left >> 3) > scatter_buffer_size)
112 return -ENOMEM;
113
114 for_each_sg(sgt->sgl, sg, sgt->nents, i) {
115 unsigned int j;
116 u64 surf_pa = sg_phys(sg);
117 unsigned int n = (int)(sg->length >> page_size_log2);
118
119 gk20a_dbg(gpu_dbg_cde, "surfPA=0x%llx + %d pages", surf_pa, n);
120
121 for (j=0; j < n && pages_left > 0; j++, surf_pa += page_size) {
122 u32 addr = (((u32)(surf_pa>>7)) & getSliceMaskGP10B) >> page_size_shift;
123 u8 scatter_bit = parity(addr);
124 u8 bit = page & 7;
125
126 d |= scatter_bit << bit;
127 if (bit == 7) {
128 scatter_buffer[page >> 3] = d;
129 d = 0;
130 }
131
132 ++page;
133 --pages_left;
134 }
135
136 if (pages_left == 0)
137 break;
138 }
139
140 /* write the last byte in case the number of pages is not divisible by 8 */
141 if ((page & 7) != 0)
142 scatter_buffer[page >> 3] = d;
143
144 if (nvgpu_log_mask_enabled(g, gpu_dbg_cde)) {
145 gk20a_dbg(gpu_dbg_cde, "scatterBuffer content:");
146 for (i = 0; i < page >> 3; i++) {
147 gk20a_dbg(gpu_dbg_cde, " %x", scatter_buffer[i]);
148 }
149 }
150
151 return 0;
152}
153
154struct nvgpu_os_linux_ops gp10b_cde_ops = {
155 .cde = {
156 .get_program_numbers = gp10b_cde_get_program_numbers,
157 .need_scatter_buffer = gp10b_need_scatter_buffer,
158 .populate_scatter_buffer = gp10b_populate_scatter_buffer,
159 },
160};
diff --git a/drivers/gpu/nvgpu/common/linux/cde_gp10b.h b/drivers/gpu/nvgpu/common/linux/cde_gp10b.h
new file mode 100644
index 00000000..52e9f292
--- /dev/null
+++ b/drivers/gpu/nvgpu/common/linux/cde_gp10b.h
@@ -0,0 +1,32 @@
1/*
2 * GP10B CDE
3 *
4 * Copyright (c) 2015-2017, NVIDIA CORPORATION. All rights reserved.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
22 * DEALINGS IN THE SOFTWARE.
23 */
24
25#ifndef _NVHOST_GP10B_CDE
26#define _NVHOST_GP10B_CDE
27
28#include "os_linux.h"
29
30extern struct nvgpu_os_linux_ops gp10b_cde_ops;
31
32#endif
diff --git a/drivers/gpu/nvgpu/common/linux/module.c b/drivers/gpu/nvgpu/common/linux/module.c
index fe3e4e6f..b7d13f05 100644
--- a/drivers/gpu/nvgpu/common/linux/module.c
+++ b/drivers/gpu/nvgpu/common/linux/module.c
@@ -49,6 +49,8 @@
49#endif 49#endif
50#endif 50#endif
51#include "os_linux.h" 51#include "os_linux.h"
52#include "cde_gm20b.h"
53#include "cde_gp10b.h"
52 54
53#define CLASS_NAME "nvidia-gpu" 55#define CLASS_NAME "nvidia-gpu"
54/* TODO: Change to e.g. "nvidia-gpu%s" once we have symlinks in place. */ 56/* TODO: Change to e.g. "nvidia-gpu%s" once we have symlinks in place. */
@@ -154,6 +156,26 @@ static int gk20a_restore_registers(struct gk20a *g)
154 return 0; 156 return 0;
155} 157}
156 158
159static int nvgpu_init_os_linux_ops(struct nvgpu_os_linux *l) {
160 struct gk20a *g = &l->g;
161 u32 ver = g->gpu_characteristics.arch + g->gpu_characteristics.impl;
162
163 switch (ver) {
164 case GK20A_GPUID_GM20B:
165 case GK20A_GPUID_GM20B_B:
166 l->ops.cde = gm20b_cde_ops.cde;
167 break;
168 case NVGPU_GPUID_GP10B:
169 l->ops.cde = gp10b_cde_ops.cde;
170 break;
171 default:
172 /* CDE is optional, so today ignoring unknown chip is fine */
173 break;
174 }
175
176 return 0;
177}
178
157int gk20a_pm_finalize_poweron(struct device *dev) 179int gk20a_pm_finalize_poweron(struct device *dev)
158{ 180{
159 struct gk20a *g = get_gk20a(dev); 181 struct gk20a *g = get_gk20a(dev);
@@ -198,6 +220,10 @@ int gk20a_pm_finalize_poweron(struct device *dev)
198 220
199 trace_gk20a_finalize_poweron_done(dev_name(dev)); 221 trace_gk20a_finalize_poweron_done(dev_name(dev));
200 222
223 err = nvgpu_init_os_linux_ops(l);
224 if (err)
225 goto done;
226
201 enable_irq(g->irq_stall); 227 enable_irq(g->irq_stall);
202 if (g->irq_stall != g->irq_nonstall) 228 if (g->irq_stall != g->irq_nonstall)
203 enable_irq(g->irq_nonstall); 229 enable_irq(g->irq_nonstall);
diff --git a/drivers/gpu/nvgpu/common/linux/os_linux.h b/drivers/gpu/nvgpu/common/linux/os_linux.h
index c67cbbcc..27433e32 100644
--- a/drivers/gpu/nvgpu/common/linux/os_linux.h
+++ b/drivers/gpu/nvgpu/common/linux/os_linux.h
@@ -24,6 +24,21 @@
24#include "gk20a/gk20a.h" 24#include "gk20a/gk20a.h"
25#include "cde.h" 25#include "cde.h"
26 26
27struct nvgpu_os_linux_ops {
28 struct {
29 void (*get_program_numbers)(struct gk20a *g,
30 u32 block_height_log2,
31 u32 shader_parameter,
32 int *hprog, int *vprog);
33 bool (*need_scatter_buffer)(struct gk20a *g);
34 int (*populate_scatter_buffer)(struct gk20a *g,
35 struct sg_table *sgt,
36 size_t surface_size,
37 void *scatter_buffer_ptr,
38 size_t scatter_buffer_size);
39 } cde;
40};
41
27struct nvgpu_os_linux { 42struct nvgpu_os_linux {
28 struct gk20a g; 43 struct gk20a g;
29 struct device *dev; 44 struct device *dev;
@@ -99,6 +114,9 @@ struct nvgpu_os_linux {
99#ifdef CONFIG_TEGRA_19x_GPU 114#ifdef CONFIG_TEGRA_19x_GPU
100 struct nvgpu_os_linux_t19x t19x; 115 struct nvgpu_os_linux_t19x t19x;
101#endif 116#endif
117
118 struct nvgpu_os_linux_ops ops;
119
102#ifdef CONFIG_DEBUG_FS 120#ifdef CONFIG_DEBUG_FS
103 struct dentry *debugfs; 121 struct dentry *debugfs;
104 struct dentry *debugfs_alias; 122 struct dentry *debugfs_alias;