diff options
Diffstat (limited to 'drivers/gpu/nvgpu/common/linux')
-rw-r--r-- | drivers/gpu/nvgpu/common/linux/driver_common.c | 12 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/common/linux/pci.c | 9 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/common/linux/platform_gk20a.h | 6 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/common/linux/platform_gk20a_tegra.c | 1 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/common/linux/platform_gp10b_tegra.c | 1 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/common/linux/platform_gv11b_tegra.c | 1 |
6 files changed, 27 insertions, 3 deletions
diff --git a/drivers/gpu/nvgpu/common/linux/driver_common.c b/drivers/gpu/nvgpu/common/linux/driver_common.c index 8086cb29..015046dd 100644 --- a/drivers/gpu/nvgpu/common/linux/driver_common.c +++ b/drivers/gpu/nvgpu/common/linux/driver_common.c | |||
@@ -73,9 +73,15 @@ static void nvgpu_init_vars(struct gk20a *g) | |||
73 | dev->dma_parms = &l->dma_parms; | 73 | dev->dma_parms = &l->dma_parms; |
74 | dma_set_max_seg_size(dev, UINT_MAX); | 74 | dma_set_max_seg_size(dev, UINT_MAX); |
75 | 75 | ||
76 | /* 34 bit mask - can be expanded for later chips is needed. */ | 76 | /* |
77 | dma_set_mask(dev, DMA_BIT_MASK(34)); | 77 | * A default of 16GB is the largest supported DMA size that is |
78 | dma_set_coherent_mask(dev, DMA_BIT_MASK(34)); | 78 | * acceptable to all currently supported Tegra SoCs. |
79 | */ | ||
80 | if (!platform->dma_mask) | ||
81 | platform->dma_mask = DMA_BIT_MASK(34); | ||
82 | |||
83 | dma_set_mask(dev, platform->dma_mask); | ||
84 | dma_set_coherent_mask(dev, platform->dma_mask); | ||
79 | 85 | ||
80 | nvgpu_init_list_node(&g->profiler_objects); | 86 | nvgpu_init_list_node(&g->profiler_objects); |
81 | 87 | ||
diff --git a/drivers/gpu/nvgpu/common/linux/pci.c b/drivers/gpu/nvgpu/common/linux/pci.c index b860e35e..70125cbc 100644 --- a/drivers/gpu/nvgpu/common/linux/pci.c +++ b/drivers/gpu/nvgpu/common/linux/pci.c | |||
@@ -101,6 +101,7 @@ static struct gk20a_platform nvgpu_pci_device[] = { | |||
101 | .ch_wdt_timeout_ms = 7000, | 101 | .ch_wdt_timeout_ms = 7000, |
102 | 102 | ||
103 | .honors_aperture = true, | 103 | .honors_aperture = true, |
104 | .dma_mask = DMA_BIT_MASK(40), | ||
104 | .vbios_min_version = 0x86063000, | 105 | .vbios_min_version = 0x86063000, |
105 | .hardcode_sw_threshold = true, | 106 | .hardcode_sw_threshold = true, |
106 | .ina3221_dcb_index = 0, | 107 | .ina3221_dcb_index = 0, |
@@ -137,6 +138,7 @@ static struct gk20a_platform nvgpu_pci_device[] = { | |||
137 | .ch_wdt_timeout_ms = 7000, | 138 | .ch_wdt_timeout_ms = 7000, |
138 | 139 | ||
139 | .honors_aperture = true, | 140 | .honors_aperture = true, |
141 | .dma_mask = DMA_BIT_MASK(40), | ||
140 | .vbios_min_version = 0x86062d00, | 142 | .vbios_min_version = 0x86062d00, |
141 | .hardcode_sw_threshold = true, | 143 | .hardcode_sw_threshold = true, |
142 | .ina3221_dcb_index = 0, | 144 | .ina3221_dcb_index = 0, |
@@ -173,6 +175,7 @@ static struct gk20a_platform nvgpu_pci_device[] = { | |||
173 | .ch_wdt_timeout_ms = 7000, | 175 | .ch_wdt_timeout_ms = 7000, |
174 | 176 | ||
175 | .honors_aperture = true, | 177 | .honors_aperture = true, |
178 | .dma_mask = DMA_BIT_MASK(40), | ||
176 | .vbios_min_version = 0x86063000, | 179 | .vbios_min_version = 0x86063000, |
177 | .hardcode_sw_threshold = true, | 180 | .hardcode_sw_threshold = true, |
178 | .ina3221_dcb_index = 0, | 181 | .ina3221_dcb_index = 0, |
@@ -209,6 +212,7 @@ static struct gk20a_platform nvgpu_pci_device[] = { | |||
209 | .ch_wdt_timeout_ms = 7000, | 212 | .ch_wdt_timeout_ms = 7000, |
210 | 213 | ||
211 | .honors_aperture = true, | 214 | .honors_aperture = true, |
215 | .dma_mask = DMA_BIT_MASK(40), | ||
212 | .vbios_min_version = 0x86065300, | 216 | .vbios_min_version = 0x86065300, |
213 | .hardcode_sw_threshold = false, | 217 | .hardcode_sw_threshold = false, |
214 | .ina3221_dcb_index = 1, | 218 | .ina3221_dcb_index = 1, |
@@ -245,6 +249,7 @@ static struct gk20a_platform nvgpu_pci_device[] = { | |||
245 | .ch_wdt_timeout_ms = 7000, | 249 | .ch_wdt_timeout_ms = 7000, |
246 | 250 | ||
247 | .honors_aperture = true, | 251 | .honors_aperture = true, |
252 | .dma_mask = DMA_BIT_MASK(40), | ||
248 | .vbios_min_version = 0x88001e00, | 253 | .vbios_min_version = 0x88001e00, |
249 | .hardcode_sw_threshold = false, | 254 | .hardcode_sw_threshold = false, |
250 | .run_preos = true, | 255 | .run_preos = true, |
@@ -279,6 +284,7 @@ static struct gk20a_platform nvgpu_pci_device[] = { | |||
279 | .ch_wdt_timeout_ms = 7000, | 284 | .ch_wdt_timeout_ms = 7000, |
280 | 285 | ||
281 | .honors_aperture = true, | 286 | .honors_aperture = true, |
287 | .dma_mask = DMA_BIT_MASK(40), | ||
282 | .vbios_min_version = 0x88001e00, | 288 | .vbios_min_version = 0x88001e00, |
283 | .hardcode_sw_threshold = false, | 289 | .hardcode_sw_threshold = false, |
284 | .run_preos = true, | 290 | .run_preos = true, |
@@ -313,6 +319,7 @@ static struct gk20a_platform nvgpu_pci_device[] = { | |||
313 | .ch_wdt_timeout_ms = 7000, | 319 | .ch_wdt_timeout_ms = 7000, |
314 | 320 | ||
315 | .honors_aperture = true, | 321 | .honors_aperture = true, |
322 | .dma_mask = DMA_BIT_MASK(40), | ||
316 | .vbios_min_version = 0x88000126, | 323 | .vbios_min_version = 0x88000126, |
317 | .hardcode_sw_threshold = false, | 324 | .hardcode_sw_threshold = false, |
318 | .run_preos = true, | 325 | .run_preos = true, |
@@ -348,6 +355,7 @@ static struct gk20a_platform nvgpu_pci_device[] = { | |||
348 | .ch_wdt_timeout_ms = 7000, | 355 | .ch_wdt_timeout_ms = 7000, |
349 | 356 | ||
350 | .honors_aperture = true, | 357 | .honors_aperture = true, |
358 | .dma_mask = DMA_BIT_MASK(40), | ||
351 | .vbios_min_version = 0x1, | 359 | .vbios_min_version = 0x1, |
352 | .hardcode_sw_threshold = false, | 360 | .hardcode_sw_threshold = false, |
353 | .run_preos = true, | 361 | .run_preos = true, |
@@ -386,6 +394,7 @@ static struct gk20a_platform nvgpu_pci_device[] = { | |||
386 | .ch_wdt_timeout_ms = 30000, | 394 | .ch_wdt_timeout_ms = 30000, |
387 | 395 | ||
388 | .honors_aperture = true, | 396 | .honors_aperture = true, |
397 | .dma_mask = DMA_BIT_MASK(40), | ||
389 | .vbios_min_version = 0x1, | 398 | .vbios_min_version = 0x1, |
390 | .hardcode_sw_threshold = false, | 399 | .hardcode_sw_threshold = false, |
391 | .unified_memory = false, | 400 | .unified_memory = false, |
diff --git a/drivers/gpu/nvgpu/common/linux/platform_gk20a.h b/drivers/gpu/nvgpu/common/linux/platform_gk20a.h index cdb221eb..07e72247 100644 --- a/drivers/gpu/nvgpu/common/linux/platform_gk20a.h +++ b/drivers/gpu/nvgpu/common/linux/platform_gk20a.h | |||
@@ -242,6 +242,12 @@ struct gk20a_platform { | |||
242 | /* unified or split memory with separate vidmem? */ | 242 | /* unified or split memory with separate vidmem? */ |
243 | bool unified_memory; | 243 | bool unified_memory; |
244 | 244 | ||
245 | /* | ||
246 | * DMA mask for Linux (both coh and non-coh). If not set defaults to | ||
247 | * 0x3ffffffff (i.e a 34 bit mask). | ||
248 | */ | ||
249 | u64 dma_mask; | ||
250 | |||
245 | /* minimum supported VBIOS version */ | 251 | /* minimum supported VBIOS version */ |
246 | u32 vbios_min_version; | 252 | u32 vbios_min_version; |
247 | 253 | ||
diff --git a/drivers/gpu/nvgpu/common/linux/platform_gk20a_tegra.c b/drivers/gpu/nvgpu/common/linux/platform_gk20a_tegra.c index 74309942..af55e5b6 100644 --- a/drivers/gpu/nvgpu/common/linux/platform_gk20a_tegra.c +++ b/drivers/gpu/nvgpu/common/linux/platform_gk20a_tegra.c | |||
@@ -951,6 +951,7 @@ struct gk20a_platform gm20b_tegra_platform = { | |||
951 | .soc_name = "tegra21x", | 951 | .soc_name = "tegra21x", |
952 | 952 | ||
953 | .unified_memory = true, | 953 | .unified_memory = true, |
954 | .dma_mask = DMA_BIT_MASK(34), | ||
954 | 955 | ||
955 | .secure_buffer_size = 335872, | 956 | .secure_buffer_size = 335872, |
956 | }; | 957 | }; |
diff --git a/drivers/gpu/nvgpu/common/linux/platform_gp10b_tegra.c b/drivers/gpu/nvgpu/common/linux/platform_gp10b_tegra.c index df10e36c..b2d6230d 100644 --- a/drivers/gpu/nvgpu/common/linux/platform_gp10b_tegra.c +++ b/drivers/gpu/nvgpu/common/linux/platform_gp10b_tegra.c | |||
@@ -438,6 +438,7 @@ struct gk20a_platform gp10b_tegra_platform = { | |||
438 | .soc_name = "tegra18x", | 438 | .soc_name = "tegra18x", |
439 | 439 | ||
440 | .unified_memory = true, | 440 | .unified_memory = true, |
441 | .dma_mask = DMA_BIT_MASK(36), | ||
441 | 442 | ||
442 | .ltc_streamid = TEGRA_SID_GPUB, | 443 | .ltc_streamid = TEGRA_SID_GPUB, |
443 | 444 | ||
diff --git a/drivers/gpu/nvgpu/common/linux/platform_gv11b_tegra.c b/drivers/gpu/nvgpu/common/linux/platform_gv11b_tegra.c index f8ff57b9..9f9d5ee1 100644 --- a/drivers/gpu/nvgpu/common/linux/platform_gv11b_tegra.c +++ b/drivers/gpu/nvgpu/common/linux/platform_gv11b_tegra.c | |||
@@ -237,6 +237,7 @@ struct gk20a_platform gv11b_tegra_platform = { | |||
237 | 237 | ||
238 | .honors_aperture = true, | 238 | .honors_aperture = true, |
239 | .unified_memory = true, | 239 | .unified_memory = true, |
240 | .dma_mask = DMA_BIT_MASK(36), | ||
240 | 241 | ||
241 | .reset_assert = gp10b_tegra_reset_assert, | 242 | .reset_assert = gp10b_tegra_reset_assert, |
242 | .reset_deassert = gp10b_tegra_reset_deassert, | 243 | .reset_deassert = gp10b_tegra_reset_deassert, |