diff options
Diffstat (limited to 'drivers/gpu/nvgpu/common/linux/vgpu/tsg_vgpu.c')
-rw-r--r-- | drivers/gpu/nvgpu/common/linux/vgpu/tsg_vgpu.c | 155 |
1 files changed, 0 insertions, 155 deletions
diff --git a/drivers/gpu/nvgpu/common/linux/vgpu/tsg_vgpu.c b/drivers/gpu/nvgpu/common/linux/vgpu/tsg_vgpu.c deleted file mode 100644 index 421763ec..00000000 --- a/drivers/gpu/nvgpu/common/linux/vgpu/tsg_vgpu.c +++ /dev/null | |||
@@ -1,155 +0,0 @@ | |||
1 | /* | ||
2 | * Copyright (c) 2016-2018, NVIDIA CORPORATION. All rights reserved. | ||
3 | * | ||
4 | * This program is free software; you can redistribute it and/or modify it | ||
5 | * under the terms and conditions of the GNU General Public License, | ||
6 | * version 2, as published by the Free Software Foundation. | ||
7 | * | ||
8 | * This program is distributed in the hope it will be useful, but WITHOUT | ||
9 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | ||
10 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | ||
11 | * more details. | ||
12 | * | ||
13 | * You should have received a copy of the GNU General Public License | ||
14 | * along with this program. If not, see <http://www.gnu.org/licenses/>. | ||
15 | */ | ||
16 | |||
17 | #include "gk20a/gk20a.h" | ||
18 | #include "gk20a/channel_gk20a.h" | ||
19 | #include "gk20a/tsg_gk20a.h" | ||
20 | #include "common/linux/platform_gk20a.h" | ||
21 | #include "vgpu.h" | ||
22 | #include "fifo_vgpu.h" | ||
23 | |||
24 | #include <nvgpu/bug.h> | ||
25 | #include <nvgpu/vgpu/tegra_vgpu.h> | ||
26 | |||
27 | int vgpu_tsg_open(struct tsg_gk20a *tsg) | ||
28 | { | ||
29 | struct tegra_vgpu_cmd_msg msg = {}; | ||
30 | struct tegra_vgpu_tsg_open_rel_params *p = | ||
31 | &msg.params.tsg_open; | ||
32 | int err; | ||
33 | |||
34 | gk20a_dbg_fn(""); | ||
35 | |||
36 | msg.cmd = TEGRA_VGPU_CMD_TSG_OPEN; | ||
37 | msg.handle = vgpu_get_handle(tsg->g); | ||
38 | p->tsg_id = tsg->tsgid; | ||
39 | err = vgpu_comm_sendrecv(&msg, sizeof(msg), sizeof(msg)); | ||
40 | err = err ? err : msg.ret; | ||
41 | if (err) { | ||
42 | nvgpu_err(tsg->g, | ||
43 | "vgpu_tsg_open failed, tsgid %d", tsg->tsgid); | ||
44 | } | ||
45 | |||
46 | return err; | ||
47 | } | ||
48 | |||
49 | void vgpu_tsg_release(struct tsg_gk20a *tsg) | ||
50 | { | ||
51 | struct tegra_vgpu_cmd_msg msg = {}; | ||
52 | struct tegra_vgpu_tsg_open_rel_params *p = | ||
53 | &msg.params.tsg_release; | ||
54 | int err; | ||
55 | |||
56 | gk20a_dbg_fn(""); | ||
57 | |||
58 | msg.cmd = TEGRA_VGPU_CMD_TSG_RELEASE; | ||
59 | msg.handle = vgpu_get_handle(tsg->g); | ||
60 | p->tsg_id = tsg->tsgid; | ||
61 | err = vgpu_comm_sendrecv(&msg, sizeof(msg), sizeof(msg)); | ||
62 | err = err ? err : msg.ret; | ||
63 | if (err) { | ||
64 | nvgpu_err(tsg->g, | ||
65 | "vgpu_tsg_release failed, tsgid %d", tsg->tsgid); | ||
66 | } | ||
67 | } | ||
68 | |||
69 | int vgpu_enable_tsg(struct tsg_gk20a *tsg) | ||
70 | { | ||
71 | struct gk20a *g = tsg->g; | ||
72 | struct channel_gk20a *ch; | ||
73 | |||
74 | nvgpu_rwsem_down_read(&tsg->ch_list_lock); | ||
75 | nvgpu_list_for_each_entry(ch, &tsg->ch_list, channel_gk20a, ch_entry) | ||
76 | g->ops.fifo.enable_channel(ch); | ||
77 | nvgpu_rwsem_up_read(&tsg->ch_list_lock); | ||
78 | |||
79 | return 0; | ||
80 | } | ||
81 | |||
82 | int vgpu_tsg_bind_channel(struct tsg_gk20a *tsg, | ||
83 | struct channel_gk20a *ch) | ||
84 | { | ||
85 | struct tegra_vgpu_cmd_msg msg = {}; | ||
86 | struct tegra_vgpu_tsg_bind_unbind_channel_params *p = | ||
87 | &msg.params.tsg_bind_unbind_channel; | ||
88 | int err; | ||
89 | |||
90 | gk20a_dbg_fn(""); | ||
91 | |||
92 | err = gk20a_tsg_bind_channel(tsg, ch); | ||
93 | if (err) | ||
94 | return err; | ||
95 | |||
96 | msg.cmd = TEGRA_VGPU_CMD_TSG_BIND_CHANNEL; | ||
97 | msg.handle = vgpu_get_handle(tsg->g); | ||
98 | p->tsg_id = tsg->tsgid; | ||
99 | p->ch_handle = ch->virt_ctx; | ||
100 | err = vgpu_comm_sendrecv(&msg, sizeof(msg), sizeof(msg)); | ||
101 | err = err ? err : msg.ret; | ||
102 | if (err) { | ||
103 | nvgpu_err(tsg->g, | ||
104 | "vgpu_tsg_bind_channel failed, ch %d tsgid %d", | ||
105 | ch->chid, tsg->tsgid); | ||
106 | gk20a_tsg_unbind_channel(ch); | ||
107 | } | ||
108 | |||
109 | return err; | ||
110 | } | ||
111 | |||
112 | int vgpu_tsg_unbind_channel(struct channel_gk20a *ch) | ||
113 | { | ||
114 | struct tegra_vgpu_cmd_msg msg = {}; | ||
115 | struct tegra_vgpu_tsg_bind_unbind_channel_params *p = | ||
116 | &msg.params.tsg_bind_unbind_channel; | ||
117 | int err; | ||
118 | |||
119 | gk20a_dbg_fn(""); | ||
120 | |||
121 | err = gk20a_fifo_tsg_unbind_channel(ch); | ||
122 | if (err) | ||
123 | return err; | ||
124 | |||
125 | msg.cmd = TEGRA_VGPU_CMD_TSG_UNBIND_CHANNEL; | ||
126 | msg.handle = vgpu_get_handle(ch->g); | ||
127 | p->ch_handle = ch->virt_ctx; | ||
128 | err = vgpu_comm_sendrecv(&msg, sizeof(msg), sizeof(msg)); | ||
129 | err = err ? err : msg.ret; | ||
130 | WARN_ON(err); | ||
131 | |||
132 | return err; | ||
133 | } | ||
134 | |||
135 | int vgpu_tsg_set_timeslice(struct tsg_gk20a *tsg, u32 timeslice) | ||
136 | { | ||
137 | struct tegra_vgpu_cmd_msg msg = {0}; | ||
138 | struct tegra_vgpu_tsg_timeslice_params *p = | ||
139 | &msg.params.tsg_timeslice; | ||
140 | int err; | ||
141 | |||
142 | gk20a_dbg_fn(""); | ||
143 | |||
144 | msg.cmd = TEGRA_VGPU_CMD_TSG_SET_TIMESLICE; | ||
145 | msg.handle = vgpu_get_handle(tsg->g); | ||
146 | p->tsg_id = tsg->tsgid; | ||
147 | p->timeslice_us = timeslice; | ||
148 | err = vgpu_comm_sendrecv(&msg, sizeof(msg), sizeof(msg)); | ||
149 | err = err ? err : msg.ret; | ||
150 | WARN_ON(err); | ||
151 | if (!err) | ||
152 | tsg->timeslice_us = timeslice; | ||
153 | |||
154 | return err; | ||
155 | } | ||