diff options
Diffstat (limited to 'drivers/gpu/nvgpu/common/linux/vgpu/gr_vgpu.h')
-rw-r--r-- | drivers/gpu/nvgpu/common/linux/vgpu/gr_vgpu.h | 68 |
1 files changed, 0 insertions, 68 deletions
diff --git a/drivers/gpu/nvgpu/common/linux/vgpu/gr_vgpu.h b/drivers/gpu/nvgpu/common/linux/vgpu/gr_vgpu.h deleted file mode 100644 index efd9e09b..00000000 --- a/drivers/gpu/nvgpu/common/linux/vgpu/gr_vgpu.h +++ /dev/null | |||
@@ -1,68 +0,0 @@ | |||
1 | /* | ||
2 | * Copyright (c) 2017-2018, NVIDIA CORPORATION. All rights reserved. | ||
3 | * | ||
4 | * This program is free software; you can redistribute it and/or modify it | ||
5 | * under the terms and conditions of the GNU General Public License, | ||
6 | * version 2, as published by the Free Software Foundation. | ||
7 | * | ||
8 | * This program is distributed in the hope it will be useful, but WITHOUT | ||
9 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | ||
10 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | ||
11 | * more details. | ||
12 | * | ||
13 | * You should have received a copy of the GNU General Public License | ||
14 | * along with this program. If not, see <http://www.gnu.org/licenses/>. | ||
15 | */ | ||
16 | |||
17 | #ifndef _GR_VGPU_H_ | ||
18 | #define _GR_VGPU_H_ | ||
19 | |||
20 | #include <nvgpu/types.h> | ||
21 | |||
22 | struct gk20a; | ||
23 | struct channel_gk20a; | ||
24 | struct gr_gk20a; | ||
25 | struct gr_zcull_info; | ||
26 | struct zbc_entry; | ||
27 | struct zbc_query_params; | ||
28 | struct dbg_session_gk20a; | ||
29 | struct tsg_gk20a; | ||
30 | |||
31 | void vgpu_gr_detect_sm_arch(struct gk20a *g); | ||
32 | void vgpu_gr_free_channel_ctx(struct channel_gk20a *c, bool is_tsg); | ||
33 | void vgpu_gr_free_tsg_ctx(struct tsg_gk20a *tsg); | ||
34 | int vgpu_gr_alloc_obj_ctx(struct channel_gk20a *c, u32 class_num, u32 flags); | ||
35 | int vgpu_gr_bind_ctxsw_zcull(struct gk20a *g, struct gr_gk20a *gr, | ||
36 | struct channel_gk20a *c, u64 zcull_va, | ||
37 | u32 mode); | ||
38 | int vgpu_gr_get_zcull_info(struct gk20a *g, struct gr_gk20a *gr, | ||
39 | struct gr_zcull_info *zcull_params); | ||
40 | u32 vgpu_gr_get_gpc_tpc_mask(struct gk20a *g, u32 gpc_index); | ||
41 | u32 vgpu_gr_get_max_fbps_count(struct gk20a *g); | ||
42 | u32 vgpu_gr_get_fbp_en_mask(struct gk20a *g); | ||
43 | u32 vgpu_gr_get_max_ltc_per_fbp(struct gk20a *g); | ||
44 | u32 vgpu_gr_get_max_lts_per_ltc(struct gk20a *g); | ||
45 | u32 *vgpu_gr_rop_l2_en_mask(struct gk20a *g); | ||
46 | int vgpu_gr_add_zbc(struct gk20a *g, struct gr_gk20a *gr, | ||
47 | struct zbc_entry *zbc_val); | ||
48 | int vgpu_gr_query_zbc(struct gk20a *g, struct gr_gk20a *gr, | ||
49 | struct zbc_query_params *query_params); | ||
50 | int vgpu_gr_set_sm_debug_mode(struct gk20a *g, | ||
51 | struct channel_gk20a *ch, u64 sms, bool enable); | ||
52 | int vgpu_gr_update_smpc_ctxsw_mode(struct gk20a *g, | ||
53 | struct channel_gk20a *ch, bool enable); | ||
54 | int vgpu_gr_update_hwpm_ctxsw_mode(struct gk20a *g, | ||
55 | struct channel_gk20a *ch, bool enable); | ||
56 | int vgpu_gr_clear_sm_error_state(struct gk20a *g, | ||
57 | struct channel_gk20a *ch, u32 sm_id); | ||
58 | int vgpu_gr_suspend_contexts(struct gk20a *g, | ||
59 | struct dbg_session_gk20a *dbg_s, | ||
60 | int *ctx_resident_ch_fd); | ||
61 | int vgpu_gr_resume_contexts(struct gk20a *g, | ||
62 | struct dbg_session_gk20a *dbg_s, | ||
63 | int *ctx_resident_ch_fd); | ||
64 | int vgpu_gr_commit_inst(struct channel_gk20a *c, u64 gpu_va); | ||
65 | int vgpu_gr_init_sm_id_table(struct gk20a *g); | ||
66 | int vgpu_gr_init_fs_state(struct gk20a *g); | ||
67 | |||
68 | #endif | ||