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path: root/drivers/gpu/nvgpu/common/linux/vgpu/gp10b/vgpu_gr_gp10b.c
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Diffstat (limited to 'drivers/gpu/nvgpu/common/linux/vgpu/gp10b/vgpu_gr_gp10b.c')
-rw-r--r--drivers/gpu/nvgpu/common/linux/vgpu/gp10b/vgpu_gr_gp10b.c37
1 files changed, 19 insertions, 18 deletions
diff --git a/drivers/gpu/nvgpu/common/linux/vgpu/gp10b/vgpu_gr_gp10b.c b/drivers/gpu/nvgpu/common/linux/vgpu/gp10b/vgpu_gr_gp10b.c
index efc9c595..fe85e113 100644
--- a/drivers/gpu/nvgpu/common/linux/vgpu/gp10b/vgpu_gr_gp10b.c
+++ b/drivers/gpu/nvgpu/common/linux/vgpu/gp10b/vgpu_gr_gp10b.c
@@ -21,6 +21,7 @@
21#include "common/linux/vgpu/vgpu.h" 21#include "common/linux/vgpu/vgpu.h"
22#include "common/linux/vgpu/gm20b/vgpu_gr_gm20b.h" 22#include "common/linux/vgpu/gm20b/vgpu_gr_gm20b.h"
23 23
24#include "gp10b/gr_gp10b.h"
24#include "vgpu_gr_gp10b.h" 25#include "vgpu_gr_gp10b.h"
25 26
26#include <nvgpu/hw/gp10b/hw_gr_gp10b.h> 27#include <nvgpu/hw/gp10b/hw_gr_gp10b.h>
@@ -45,10 +46,10 @@ void vgpu_gr_gp10b_free_gr_ctx(struct gk20a *g, struct vm_gk20a *vm,
45 46
46 __nvgpu_vm_free_va(vm, gr_ctx->mem.gpu_va, gmmu_page_size_kernel); 47 __nvgpu_vm_free_va(vm, gr_ctx->mem.gpu_va, gmmu_page_size_kernel);
47 48
48 nvgpu_dma_unmap_free(vm, &gr_ctx->t18x.pagepool_ctxsw_buffer); 49 nvgpu_dma_unmap_free(vm, &gr_ctx->pagepool_ctxsw_buffer);
49 nvgpu_dma_unmap_free(vm, &gr_ctx->t18x.betacb_ctxsw_buffer); 50 nvgpu_dma_unmap_free(vm, &gr_ctx->betacb_ctxsw_buffer);
50 nvgpu_dma_unmap_free(vm, &gr_ctx->t18x.spill_ctxsw_buffer); 51 nvgpu_dma_unmap_free(vm, &gr_ctx->spill_ctxsw_buffer);
51 nvgpu_dma_unmap_free(vm, &gr_ctx->t18x.preempt_ctxsw_buffer); 52 nvgpu_dma_unmap_free(vm, &gr_ctx->preempt_ctxsw_buffer);
52 53
53 nvgpu_kfree(g, gr_ctx); 54 nvgpu_kfree(g, gr_ctx);
54} 55}
@@ -122,11 +123,11 @@ int vgpu_gr_gp10b_set_ctxsw_preemption_mode(struct gk20a *g,
122 int err = 0; 123 int err = 0;
123 124
124 if (g->ops.gr.is_valid_gfx_class(g, class) && 125 if (g->ops.gr.is_valid_gfx_class(g, class) &&
125 g->gr.t18x.ctx_vars.force_preemption_gfxp) 126 g->gr.ctx_vars.force_preemption_gfxp)
126 graphics_preempt_mode = NVGPU_PREEMPTION_MODE_GRAPHICS_GFXP; 127 graphics_preempt_mode = NVGPU_PREEMPTION_MODE_GRAPHICS_GFXP;
127 128
128 if (g->ops.gr.is_valid_compute_class(g, class) && 129 if (g->ops.gr.is_valid_compute_class(g, class) &&
129 g->gr.t18x.ctx_vars.force_preemption_cilp) 130 g->gr.ctx_vars.force_preemption_cilp)
130 compute_preempt_mode = NVGPU_PREEMPTION_MODE_COMPUTE_CILP; 131 compute_preempt_mode = NVGPU_PREEMPTION_MODE_COMPUTE_CILP;
131 132
132 /* check for invalid combinations */ 133 /* check for invalid combinations */
@@ -157,54 +158,54 @@ int vgpu_gr_gp10b_set_ctxsw_preemption_mode(struct gk20a *g,
157 attrib_cb_size = ALIGN(attrib_cb_size, 128); 158 attrib_cb_size = ALIGN(attrib_cb_size, 128);
158 159
159 gk20a_dbg_info("gfxp context preempt size=%d", 160 gk20a_dbg_info("gfxp context preempt size=%d",
160 g->gr.t18x.ctx_vars.preempt_image_size); 161 g->gr.ctx_vars.preempt_image_size);
161 gk20a_dbg_info("gfxp context spill size=%d", spill_size); 162 gk20a_dbg_info("gfxp context spill size=%d", spill_size);
162 gk20a_dbg_info("gfxp context pagepool size=%d", pagepool_size); 163 gk20a_dbg_info("gfxp context pagepool size=%d", pagepool_size);
163 gk20a_dbg_info("gfxp context attrib cb size=%d", 164 gk20a_dbg_info("gfxp context attrib cb size=%d",
164 attrib_cb_size); 165 attrib_cb_size);
165 166
166 err = gr_gp10b_alloc_buffer(vm, 167 err = gr_gp10b_alloc_buffer(vm,
167 g->gr.t18x.ctx_vars.preempt_image_size, 168 g->gr.ctx_vars.preempt_image_size,
168 &gr_ctx->t18x.preempt_ctxsw_buffer); 169 &gr_ctx->preempt_ctxsw_buffer);
169 if (err) { 170 if (err) {
170 err = -ENOMEM; 171 err = -ENOMEM;
171 goto fail; 172 goto fail;
172 } 173 }
173 desc = &gr_ctx->t18x.preempt_ctxsw_buffer; 174 desc = &gr_ctx->preempt_ctxsw_buffer;
174 p->gpu_va[TEGRA_VGPU_GR_BIND_CTXSW_BUFFER_MAIN] = desc->gpu_va; 175 p->gpu_va[TEGRA_VGPU_GR_BIND_CTXSW_BUFFER_MAIN] = desc->gpu_va;
175 p->size[TEGRA_VGPU_GR_BIND_CTXSW_BUFFER_MAIN] = desc->size; 176 p->size[TEGRA_VGPU_GR_BIND_CTXSW_BUFFER_MAIN] = desc->size;
176 177
177 err = gr_gp10b_alloc_buffer(vm, 178 err = gr_gp10b_alloc_buffer(vm,
178 spill_size, 179 spill_size,
179 &gr_ctx->t18x.spill_ctxsw_buffer); 180 &gr_ctx->spill_ctxsw_buffer);
180 if (err) { 181 if (err) {
181 err = -ENOMEM; 182 err = -ENOMEM;
182 goto fail; 183 goto fail;
183 } 184 }
184 desc = &gr_ctx->t18x.spill_ctxsw_buffer; 185 desc = &gr_ctx->spill_ctxsw_buffer;
185 p->gpu_va[TEGRA_VGPU_GR_BIND_CTXSW_BUFFER_SPILL] = desc->gpu_va; 186 p->gpu_va[TEGRA_VGPU_GR_BIND_CTXSW_BUFFER_SPILL] = desc->gpu_va;
186 p->size[TEGRA_VGPU_GR_BIND_CTXSW_BUFFER_SPILL] = desc->size; 187 p->size[TEGRA_VGPU_GR_BIND_CTXSW_BUFFER_SPILL] = desc->size;
187 188
188 err = gr_gp10b_alloc_buffer(vm, 189 err = gr_gp10b_alloc_buffer(vm,
189 pagepool_size, 190 pagepool_size,
190 &gr_ctx->t18x.pagepool_ctxsw_buffer); 191 &gr_ctx->pagepool_ctxsw_buffer);
191 if (err) { 192 if (err) {
192 err = -ENOMEM; 193 err = -ENOMEM;
193 goto fail; 194 goto fail;
194 } 195 }
195 desc = &gr_ctx->t18x.pagepool_ctxsw_buffer; 196 desc = &gr_ctx->pagepool_ctxsw_buffer;
196 p->gpu_va[TEGRA_VGPU_GR_BIND_CTXSW_BUFFER_PAGEPOOL] = 197 p->gpu_va[TEGRA_VGPU_GR_BIND_CTXSW_BUFFER_PAGEPOOL] =
197 desc->gpu_va; 198 desc->gpu_va;
198 p->size[TEGRA_VGPU_GR_BIND_CTXSW_BUFFER_PAGEPOOL] = desc->size; 199 p->size[TEGRA_VGPU_GR_BIND_CTXSW_BUFFER_PAGEPOOL] = desc->size;
199 200
200 err = gr_gp10b_alloc_buffer(vm, 201 err = gr_gp10b_alloc_buffer(vm,
201 attrib_cb_size, 202 attrib_cb_size,
202 &gr_ctx->t18x.betacb_ctxsw_buffer); 203 &gr_ctx->betacb_ctxsw_buffer);
203 if (err) { 204 if (err) {
204 err = -ENOMEM; 205 err = -ENOMEM;
205 goto fail; 206 goto fail;
206 } 207 }
207 desc = &gr_ctx->t18x.betacb_ctxsw_buffer; 208 desc = &gr_ctx->betacb_ctxsw_buffer;
208 p->gpu_va[TEGRA_VGPU_GR_BIND_CTXSW_BUFFER_BETACB] = 209 p->gpu_va[TEGRA_VGPU_GR_BIND_CTXSW_BUFFER_BETACB] =
209 desc->gpu_va; 210 desc->gpu_va;
210 p->size[TEGRA_VGPU_GR_BIND_CTXSW_BUFFER_BETACB] = desc->size; 211 p->size[TEGRA_VGPU_GR_BIND_CTXSW_BUFFER_BETACB] = desc->size;
@@ -323,9 +324,9 @@ int vgpu_gr_gp10b_init_ctx_state(struct gk20a *g)
323 if (err) 324 if (err)
324 return err; 325 return err;
325 326
326 g->gr.t18x.ctx_vars.preempt_image_size = 327 g->gr.ctx_vars.preempt_image_size =
327 priv->constants.preempt_ctx_size; 328 priv->constants.preempt_ctx_size;
328 if (!g->gr.t18x.ctx_vars.preempt_image_size) 329 if (!g->gr.ctx_vars.preempt_image_size)
329 return -EINVAL; 330 return -EINVAL;
330 331
331 return 0; 332 return 0;