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path: root/drivers/gpu/nvgpu/common/linux/vgpu/fifo_vgpu.c
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Diffstat (limited to 'drivers/gpu/nvgpu/common/linux/vgpu/fifo_vgpu.c')
-rw-r--r--drivers/gpu/nvgpu/common/linux/vgpu/fifo_vgpu.c9
1 files changed, 3 insertions, 6 deletions
diff --git a/drivers/gpu/nvgpu/common/linux/vgpu/fifo_vgpu.c b/drivers/gpu/nvgpu/common/linux/vgpu/fifo_vgpu.c
index e8ca9d2f..2a7cfdb3 100644
--- a/drivers/gpu/nvgpu/common/linux/vgpu/fifo_vgpu.c
+++ b/drivers/gpu/nvgpu/common/linux/vgpu/fifo_vgpu.c
@@ -147,7 +147,6 @@ int vgpu_channel_setup_ramfc(struct channel_gk20a *ch, u64 gpfifo_base,
147 u32 gpfifo_entries, 147 u32 gpfifo_entries,
148 unsigned long acquire_timeout, u32 flags) 148 unsigned long acquire_timeout, u32 flags)
149{ 149{
150 struct device __maybe_unused *d = dev_from_gk20a(ch->g);
151 struct tegra_vgpu_cmd_msg msg; 150 struct tegra_vgpu_cmd_msg msg;
152 struct tegra_vgpu_ramfc_params *p = &msg.params.ramfc; 151 struct tegra_vgpu_ramfc_params *p = &msg.params.ramfc;
153 int err; 152 int err;
@@ -211,7 +210,6 @@ int vgpu_fifo_init_engine_info(struct fifo_gk20a *f)
211static int init_runlist(struct gk20a *g, struct fifo_gk20a *f) 210static int init_runlist(struct gk20a *g, struct fifo_gk20a *f)
212{ 211{
213 struct fifo_runlist_info_gk20a *runlist; 212 struct fifo_runlist_info_gk20a *runlist;
214 struct device *d = dev_from_gk20a(g);
215 unsigned int runlist_id = -1; 213 unsigned int runlist_id = -1;
216 u32 i; 214 u32 i;
217 u64 runlist_size; 215 u64 runlist_size;
@@ -242,7 +240,7 @@ static int init_runlist(struct gk20a *g, struct fifo_gk20a *f)
242 int err = nvgpu_dma_alloc_sys(g, runlist_size, 240 int err = nvgpu_dma_alloc_sys(g, runlist_size,
243 &runlist->mem[i]); 241 &runlist->mem[i]);
244 if (err) { 242 if (err) {
245 dev_err(d, "memory allocation failed\n"); 243 nvgpu_err(g, "memory allocation failed");
246 goto clean_up_runlist; 244 goto clean_up_runlist;
247 } 245 }
248 } 246 }
@@ -266,7 +264,6 @@ static int vgpu_init_fifo_setup_sw(struct gk20a *g)
266{ 264{
267 struct nvgpu_os_linux *l = nvgpu_os_linux_from_gk20a(g); 265 struct nvgpu_os_linux *l = nvgpu_os_linux_from_gk20a(g);
268 struct fifo_gk20a *f = &g->fifo; 266 struct fifo_gk20a *f = &g->fifo;
269 struct device *d = dev_from_gk20a(g);
270 struct vgpu_priv_data *priv = vgpu_get_priv_data(g); 267 struct vgpu_priv_data *priv = vgpu_get_priv_data(g);
271 unsigned int chid; 268 unsigned int chid;
272 int err = 0; 269 int err = 0;
@@ -287,7 +284,7 @@ static int vgpu_init_fifo_setup_sw(struct gk20a *g)
287 err = nvgpu_dma_alloc_sys(g, f->userd_entry_size * f->num_channels, 284 err = nvgpu_dma_alloc_sys(g, f->userd_entry_size * f->num_channels,
288 &f->userd); 285 &f->userd);
289 if (err) { 286 if (err) {
290 dev_err(d, "memory allocation failed\n"); 287 nvgpu_err(g, "memory allocation failed");
291 goto clean_up; 288 goto clean_up;
292 } 289 }
293 290
@@ -296,7 +293,7 @@ static int vgpu_init_fifo_setup_sw(struct gk20a *g)
296 f->userd.gpu_va = vgpu_bar1_map(g, &f->userd.priv.sgt, 293 f->userd.gpu_va = vgpu_bar1_map(g, &f->userd.priv.sgt,
297 f->userd.size); 294 f->userd.size);
298 if (!f->userd.gpu_va) { 295 if (!f->userd.gpu_va) {
299 dev_err(d, "gmmu mapping failed\n"); 296 nvgpu_err(g, "gmmu mapping failed");
300 goto clean_up; 297 goto clean_up;
301 } 298 }
302 /* if reduced BAR1 range is specified, use offset of 0 299 /* if reduced BAR1 range is specified, use offset of 0