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path: root/drivers/gpu/nvgpu/common/linux/soc.c
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Diffstat (limited to 'drivers/gpu/nvgpu/common/linux/soc.c')
-rw-r--r--drivers/gpu/nvgpu/common/linux/soc.c8
1 files changed, 8 insertions, 0 deletions
diff --git a/drivers/gpu/nvgpu/common/linux/soc.c b/drivers/gpu/nvgpu/common/linux/soc.c
index 305d8bd9..1b27d6f1 100644
--- a/drivers/gpu/nvgpu/common/linux/soc.c
+++ b/drivers/gpu/nvgpu/common/linux/soc.c
@@ -12,6 +12,7 @@
12 */ 12 */
13 13
14#include <soc/tegra/chip-id.h> 14#include <soc/tegra/chip-id.h>
15#include <soc/tegra/fuse.h>
15#include <soc/tegra/tegra_bpmp.h> 16#include <soc/tegra/tegra_bpmp.h>
16#ifdef CONFIG_TEGRA_HV_MANAGER 17#ifdef CONFIG_TEGRA_HV_MANAGER
17#include <soc/tegra/virt/syscalls.h> 18#include <soc/tegra/virt/syscalls.h>
@@ -46,6 +47,13 @@ bool nvgpu_is_bpmp_running(struct gk20a *g)
46 return tegra_bpmp_running(); 47 return tegra_bpmp_running();
47} 48}
48 49
50bool nvgpu_is_soc_t194_a01(struct gk20a *g)
51{
52 return ((tegra_get_chip_id() == TEGRA194 &&
53 tegra_chip_get_revision() == TEGRA194_REVISION_A01) ?
54 true : false);
55}
56
49#ifdef CONFIG_TEGRA_HV_MANAGER 57#ifdef CONFIG_TEGRA_HV_MANAGER
50/* When nvlink is enabled on dGPU, we need to use physical memory addresses. 58/* When nvlink is enabled on dGPU, we need to use physical memory addresses.
51 * There is no SMMU translation. However, the device initially enumerates as a 59 * There is no SMMU translation. However, the device initially enumerates as a