diff options
Diffstat (limited to 'drivers/gpu/nvgpu/common/linux/scale.c')
-rw-r--r-- | drivers/gpu/nvgpu/common/linux/scale.c | 428 |
1 files changed, 0 insertions, 428 deletions
diff --git a/drivers/gpu/nvgpu/common/linux/scale.c b/drivers/gpu/nvgpu/common/linux/scale.c deleted file mode 100644 index 84ac1cfd..00000000 --- a/drivers/gpu/nvgpu/common/linux/scale.c +++ /dev/null | |||
@@ -1,428 +0,0 @@ | |||
1 | /* | ||
2 | * gk20a clock scaling profile | ||
3 | * | ||
4 | * Copyright (c) 2013-2017, NVIDIA Corporation. All rights reserved. | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify it | ||
7 | * under the terms and conditions of the GNU General Public License, | ||
8 | * version 2, as published by the Free Software Foundation. | ||
9 | * | ||
10 | * This program is distributed in the hope it will be useful, but WITHOUT | ||
11 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | ||
12 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | ||
13 | * more details. | ||
14 | * | ||
15 | * You should have received a copy of the GNU General Public License | ||
16 | * along with this program. If not, see <http://www.gnu.org/licenses/>. | ||
17 | */ | ||
18 | |||
19 | #include <linux/devfreq.h> | ||
20 | #include <linux/export.h> | ||
21 | #include <soc/tegra/chip-id.h> | ||
22 | #include <linux/pm_qos.h> | ||
23 | |||
24 | #include <governor.h> | ||
25 | |||
26 | #include <nvgpu/kmem.h> | ||
27 | #include <nvgpu/log.h> | ||
28 | |||
29 | #include "gk20a/gk20a.h" | ||
30 | #include "platform_gk20a.h" | ||
31 | #include "scale.h" | ||
32 | #include "os_linux.h" | ||
33 | |||
34 | /* | ||
35 | * gk20a_scale_qos_notify() | ||
36 | * | ||
37 | * This function is called when the minimum QoS requirement for the device | ||
38 | * has changed. The function calls postscaling callback if it is defined. | ||
39 | */ | ||
40 | |||
41 | #if defined(CONFIG_COMMON_CLK) | ||
42 | int gk20a_scale_qos_notify(struct notifier_block *nb, | ||
43 | unsigned long n, void *p) | ||
44 | { | ||
45 | struct gk20a_scale_profile *profile = | ||
46 | container_of(nb, struct gk20a_scale_profile, | ||
47 | qos_notify_block); | ||
48 | struct gk20a *g = get_gk20a(profile->dev); | ||
49 | struct nvgpu_os_linux *l = nvgpu_os_linux_from_gk20a(g); | ||
50 | struct devfreq *devfreq = l->devfreq; | ||
51 | |||
52 | if (!devfreq) | ||
53 | return NOTIFY_OK; | ||
54 | |||
55 | mutex_lock(&devfreq->lock); | ||
56 | /* check for pm_qos min and max frequency requirement */ | ||
57 | profile->qos_min_freq = | ||
58 | (unsigned long)pm_qos_read_min_bound(PM_QOS_GPU_FREQ_BOUNDS) * 1000UL; | ||
59 | profile->qos_max_freq = | ||
60 | (unsigned long)pm_qos_read_max_bound(PM_QOS_GPU_FREQ_BOUNDS) * 1000UL; | ||
61 | |||
62 | if (profile->qos_min_freq > profile->qos_max_freq) { | ||
63 | nvgpu_err(g, | ||
64 | "QoS: setting invalid limit, min_freq=%lu max_freq=%lu", | ||
65 | profile->qos_min_freq, profile->qos_max_freq); | ||
66 | profile->qos_min_freq = profile->qos_max_freq; | ||
67 | } | ||
68 | |||
69 | update_devfreq(devfreq); | ||
70 | mutex_unlock(&devfreq->lock); | ||
71 | |||
72 | return NOTIFY_OK; | ||
73 | } | ||
74 | #else | ||
75 | int gk20a_scale_qos_notify(struct notifier_block *nb, | ||
76 | unsigned long n, void *p) | ||
77 | { | ||
78 | struct gk20a_scale_profile *profile = | ||
79 | container_of(nb, struct gk20a_scale_profile, | ||
80 | qos_notify_block); | ||
81 | struct gk20a_platform *platform = dev_get_drvdata(profile->dev); | ||
82 | struct gk20a *g = get_gk20a(profile->dev); | ||
83 | struct nvgpu_os_linux *l = nvgpu_os_linux_from_gk20a(g); | ||
84 | unsigned long freq; | ||
85 | |||
86 | if (!platform->postscale) | ||
87 | return NOTIFY_OK; | ||
88 | |||
89 | /* get the frequency requirement. if devfreq is enabled, check if it | ||
90 | * has higher demand than qos */ | ||
91 | freq = platform->clk_round_rate(profile->dev, | ||
92 | (u32)pm_qos_read_min_bound(PM_QOS_GPU_FREQ_BOUNDS)); | ||
93 | if (l->devfreq) | ||
94 | freq = max(l->devfreq->previous_freq, freq); | ||
95 | |||
96 | /* Update gpu load because we may scale the emc target | ||
97 | * if the gpu load changed. */ | ||
98 | nvgpu_pmu_load_update(g); | ||
99 | platform->postscale(profile->dev, freq); | ||
100 | |||
101 | return NOTIFY_OK; | ||
102 | } | ||
103 | #endif | ||
104 | |||
105 | /* | ||
106 | * gk20a_scale_make_freq_table(profile) | ||
107 | * | ||
108 | * This function initialises the frequency table for the given device profile | ||
109 | */ | ||
110 | |||
111 | static int gk20a_scale_make_freq_table(struct gk20a_scale_profile *profile) | ||
112 | { | ||
113 | struct gk20a_platform *platform = dev_get_drvdata(profile->dev); | ||
114 | int num_freqs, err; | ||
115 | unsigned long *freqs; | ||
116 | |||
117 | if (platform->get_clk_freqs) { | ||
118 | /* get gpu frequency table */ | ||
119 | err = platform->get_clk_freqs(profile->dev, &freqs, | ||
120 | &num_freqs); | ||
121 | if (err) | ||
122 | return -ENOSYS; | ||
123 | } else | ||
124 | return -ENOSYS; | ||
125 | |||
126 | profile->devfreq_profile.freq_table = (unsigned long *)freqs; | ||
127 | profile->devfreq_profile.max_state = num_freqs; | ||
128 | |||
129 | return 0; | ||
130 | } | ||
131 | |||
132 | /* | ||
133 | * gk20a_scale_target(dev, *freq, flags) | ||
134 | * | ||
135 | * This function scales the clock | ||
136 | */ | ||
137 | |||
138 | static int gk20a_scale_target(struct device *dev, unsigned long *freq, | ||
139 | u32 flags) | ||
140 | { | ||
141 | struct gk20a_platform *platform = dev_get_drvdata(dev); | ||
142 | struct gk20a *g = platform->g; | ||
143 | struct nvgpu_os_linux *l = nvgpu_os_linux_from_gk20a(g); | ||
144 | struct gk20a_scale_profile *profile = g->scale_profile; | ||
145 | struct devfreq *devfreq = l->devfreq; | ||
146 | unsigned long local_freq = *freq; | ||
147 | unsigned long rounded_rate; | ||
148 | unsigned long min_freq = 0, max_freq = 0; | ||
149 | |||
150 | /* | ||
151 | * Calculate floor and cap frequency values | ||
152 | * | ||
153 | * Policy : | ||
154 | * We have two APIs to clip the frequency | ||
155 | * 1. devfreq | ||
156 | * 2. pm_qos | ||
157 | * | ||
158 | * To calculate floor (min) freq, we select MAX of floor frequencies | ||
159 | * requested from both APIs | ||
160 | * To get cap (max) freq, we select MIN of max frequencies | ||
161 | * | ||
162 | * In case we have conflict (min_freq > max_freq) after above | ||
163 | * steps, we ensure that max_freq wins over min_freq | ||
164 | */ | ||
165 | min_freq = max_t(u32, devfreq->min_freq, profile->qos_min_freq); | ||
166 | max_freq = min_t(u32, devfreq->max_freq, profile->qos_max_freq); | ||
167 | |||
168 | if (min_freq > max_freq) | ||
169 | min_freq = max_freq; | ||
170 | |||
171 | /* Clip requested frequency */ | ||
172 | if (local_freq < min_freq) | ||
173 | local_freq = min_freq; | ||
174 | |||
175 | if (local_freq > max_freq) | ||
176 | local_freq = max_freq; | ||
177 | |||
178 | /* set the final frequency */ | ||
179 | rounded_rate = platform->clk_round_rate(dev, local_freq); | ||
180 | |||
181 | /* Check for duplicate request */ | ||
182 | if (rounded_rate == g->last_freq) | ||
183 | return 0; | ||
184 | |||
185 | if (g->ops.clk.get_rate(g, CTRL_CLK_DOMAIN_GPCCLK) == rounded_rate) | ||
186 | *freq = rounded_rate; | ||
187 | else { | ||
188 | g->ops.clk.set_rate(g, CTRL_CLK_DOMAIN_GPCCLK, rounded_rate); | ||
189 | *freq = g->ops.clk.get_rate(g, CTRL_CLK_DOMAIN_GPCCLK); | ||
190 | } | ||
191 | |||
192 | g->last_freq = *freq; | ||
193 | |||
194 | /* postscale will only scale emc (dram clock) if evaluating | ||
195 | * gk20a_tegra_get_emc_rate() produces a new or different emc | ||
196 | * target because the load or_and gpufreq has changed */ | ||
197 | if (platform->postscale) | ||
198 | platform->postscale(dev, rounded_rate); | ||
199 | |||
200 | return 0; | ||
201 | } | ||
202 | |||
203 | /* | ||
204 | * update_load_estimate_gpmu(profile) | ||
205 | * | ||
206 | * Update load estimate using gpmu. The gpmu value is normalised | ||
207 | * based on the time it was asked last time. | ||
208 | */ | ||
209 | |||
210 | static void update_load_estimate_gpmu(struct device *dev) | ||
211 | { | ||
212 | struct gk20a *g = get_gk20a(dev); | ||
213 | struct gk20a_scale_profile *profile = g->scale_profile; | ||
214 | unsigned long dt; | ||
215 | u32 busy_time; | ||
216 | ktime_t t; | ||
217 | |||
218 | t = ktime_get(); | ||
219 | dt = ktime_us_delta(t, profile->last_event_time); | ||
220 | |||
221 | profile->dev_stat.total_time = dt; | ||
222 | profile->last_event_time = t; | ||
223 | nvgpu_pmu_load_norm(g, &busy_time); | ||
224 | profile->dev_stat.busy_time = (busy_time * dt) / 1000; | ||
225 | } | ||
226 | |||
227 | /* | ||
228 | * gk20a_scale_suspend(dev) | ||
229 | * | ||
230 | * This function informs devfreq of suspend | ||
231 | */ | ||
232 | |||
233 | void gk20a_scale_suspend(struct device *dev) | ||
234 | { | ||
235 | struct gk20a *g = get_gk20a(dev); | ||
236 | struct nvgpu_os_linux *l = nvgpu_os_linux_from_gk20a(g); | ||
237 | struct devfreq *devfreq = l->devfreq; | ||
238 | |||
239 | if (!devfreq) | ||
240 | return; | ||
241 | |||
242 | devfreq_suspend_device(devfreq); | ||
243 | } | ||
244 | |||
245 | /* | ||
246 | * gk20a_scale_resume(dev) | ||
247 | * | ||
248 | * This functions informs devfreq of resume | ||
249 | */ | ||
250 | |||
251 | void gk20a_scale_resume(struct device *dev) | ||
252 | { | ||
253 | struct gk20a *g = get_gk20a(dev); | ||
254 | struct nvgpu_os_linux *l = nvgpu_os_linux_from_gk20a(g); | ||
255 | struct devfreq *devfreq = l->devfreq; | ||
256 | |||
257 | if (!devfreq) | ||
258 | return; | ||
259 | |||
260 | g->last_freq = 0; | ||
261 | devfreq_resume_device(devfreq); | ||
262 | } | ||
263 | |||
264 | /* | ||
265 | * gk20a_scale_get_dev_status(dev, *stat) | ||
266 | * | ||
267 | * This function queries the current device status. | ||
268 | */ | ||
269 | |||
270 | static int gk20a_scale_get_dev_status(struct device *dev, | ||
271 | struct devfreq_dev_status *stat) | ||
272 | { | ||
273 | struct gk20a *g = get_gk20a(dev); | ||
274 | struct gk20a_scale_profile *profile = g->scale_profile; | ||
275 | struct gk20a_platform *platform = dev_get_drvdata(dev); | ||
276 | |||
277 | /* update the software shadow */ | ||
278 | nvgpu_pmu_load_update(g); | ||
279 | |||
280 | /* inform edp about new constraint */ | ||
281 | if (platform->prescale) | ||
282 | platform->prescale(dev); | ||
283 | |||
284 | /* Make sure there are correct values for the current frequency */ | ||
285 | profile->dev_stat.current_frequency = | ||
286 | g->ops.clk.get_rate(g, CTRL_CLK_DOMAIN_GPCCLK); | ||
287 | |||
288 | /* Update load estimate */ | ||
289 | update_load_estimate_gpmu(dev); | ||
290 | |||
291 | /* Copy the contents of the current device status */ | ||
292 | *stat = profile->dev_stat; | ||
293 | |||
294 | /* Finally, clear out the local values */ | ||
295 | profile->dev_stat.total_time = 0; | ||
296 | profile->dev_stat.busy_time = 0; | ||
297 | |||
298 | return 0; | ||
299 | } | ||
300 | |||
301 | /* | ||
302 | * get_cur_freq(struct device *dev, unsigned long *freq) | ||
303 | * | ||
304 | * This function gets the current GPU clock rate. | ||
305 | */ | ||
306 | |||
307 | static int get_cur_freq(struct device *dev, unsigned long *freq) | ||
308 | { | ||
309 | struct gk20a *g = get_gk20a(dev); | ||
310 | *freq = g->ops.clk.get_rate(g, CTRL_CLK_DOMAIN_GPCCLK); | ||
311 | return 0; | ||
312 | } | ||
313 | |||
314 | |||
315 | /* | ||
316 | * gk20a_scale_init(dev) | ||
317 | */ | ||
318 | |||
319 | void gk20a_scale_init(struct device *dev) | ||
320 | { | ||
321 | struct gk20a_platform *platform = dev_get_drvdata(dev); | ||
322 | struct gk20a *g = platform->g; | ||
323 | struct nvgpu_os_linux *l = nvgpu_os_linux_from_gk20a(g); | ||
324 | struct gk20a_scale_profile *profile; | ||
325 | int err; | ||
326 | |||
327 | if (g->scale_profile) | ||
328 | return; | ||
329 | |||
330 | if (!platform->devfreq_governor && !platform->qos_notify) | ||
331 | return; | ||
332 | |||
333 | profile = nvgpu_kzalloc(g, sizeof(*profile)); | ||
334 | |||
335 | profile->dev = dev; | ||
336 | profile->dev_stat.busy = false; | ||
337 | |||
338 | /* Create frequency table */ | ||
339 | err = gk20a_scale_make_freq_table(profile); | ||
340 | if (err || !profile->devfreq_profile.max_state) | ||
341 | goto err_get_freqs; | ||
342 | |||
343 | profile->qos_min_freq = 0; | ||
344 | profile->qos_max_freq = UINT_MAX; | ||
345 | |||
346 | /* Store device profile so we can access it if devfreq governor | ||
347 | * init needs that */ | ||
348 | g->scale_profile = profile; | ||
349 | |||
350 | if (platform->devfreq_governor) { | ||
351 | struct devfreq *devfreq; | ||
352 | |||
353 | profile->devfreq_profile.initial_freq = | ||
354 | profile->devfreq_profile.freq_table[0]; | ||
355 | profile->devfreq_profile.target = gk20a_scale_target; | ||
356 | profile->devfreq_profile.get_dev_status = | ||
357 | gk20a_scale_get_dev_status; | ||
358 | profile->devfreq_profile.get_cur_freq = get_cur_freq; | ||
359 | profile->devfreq_profile.polling_ms = 25; | ||
360 | |||
361 | devfreq = devfreq_add_device(dev, | ||
362 | &profile->devfreq_profile, | ||
363 | platform->devfreq_governor, NULL); | ||
364 | |||
365 | if (IS_ERR(devfreq)) | ||
366 | devfreq = NULL; | ||
367 | |||
368 | l->devfreq = devfreq; | ||
369 | } | ||
370 | |||
371 | /* Should we register QoS callback for this device? */ | ||
372 | if (platform->qos_notify) { | ||
373 | profile->qos_notify_block.notifier_call = | ||
374 | platform->qos_notify; | ||
375 | |||
376 | pm_qos_add_min_notifier(PM_QOS_GPU_FREQ_BOUNDS, | ||
377 | &profile->qos_notify_block); | ||
378 | pm_qos_add_max_notifier(PM_QOS_GPU_FREQ_BOUNDS, | ||
379 | &profile->qos_notify_block); | ||
380 | } | ||
381 | |||
382 | return; | ||
383 | |||
384 | err_get_freqs: | ||
385 | nvgpu_kfree(g, profile); | ||
386 | } | ||
387 | |||
388 | void gk20a_scale_exit(struct device *dev) | ||
389 | { | ||
390 | struct gk20a_platform *platform = dev_get_drvdata(dev); | ||
391 | struct gk20a *g = platform->g; | ||
392 | struct nvgpu_os_linux *l = nvgpu_os_linux_from_gk20a(g); | ||
393 | int err; | ||
394 | |||
395 | if (platform->qos_notify) { | ||
396 | pm_qos_remove_min_notifier(PM_QOS_GPU_FREQ_BOUNDS, | ||
397 | &g->scale_profile->qos_notify_block); | ||
398 | pm_qos_remove_max_notifier(PM_QOS_GPU_FREQ_BOUNDS, | ||
399 | &g->scale_profile->qos_notify_block); | ||
400 | } | ||
401 | |||
402 | if (platform->devfreq_governor) { | ||
403 | err = devfreq_remove_device(l->devfreq); | ||
404 | l->devfreq = NULL; | ||
405 | } | ||
406 | |||
407 | nvgpu_kfree(g, g->scale_profile); | ||
408 | g->scale_profile = NULL; | ||
409 | } | ||
410 | |||
411 | /* | ||
412 | * gk20a_scale_hw_init(dev) | ||
413 | * | ||
414 | * Initialize hardware portion of the device | ||
415 | */ | ||
416 | |||
417 | void gk20a_scale_hw_init(struct device *dev) | ||
418 | { | ||
419 | struct gk20a_platform *platform = dev_get_drvdata(dev); | ||
420 | struct gk20a_scale_profile *profile = platform->g->scale_profile; | ||
421 | |||
422 | /* make sure that scaling has bee initialised */ | ||
423 | if (!profile) | ||
424 | return; | ||
425 | |||
426 | profile->dev_stat.total_time = 0; | ||
427 | profile->last_event_time = ktime_get(); | ||
428 | } | ||