diff options
Diffstat (limited to 'drivers/gpu/nvgpu/common/linux/platform_gk20a_tegra.c')
-rw-r--r-- | drivers/gpu/nvgpu/common/linux/platform_gk20a_tegra.c | 135 |
1 files changed, 0 insertions, 135 deletions
diff --git a/drivers/gpu/nvgpu/common/linux/platform_gk20a_tegra.c b/drivers/gpu/nvgpu/common/linux/platform_gk20a_tegra.c index ec14c08e..fda3bc95 100644 --- a/drivers/gpu/nvgpu/common/linux/platform_gk20a_tegra.c +++ b/drivers/gpu/nvgpu/common/linux/platform_gk20a_tegra.c | |||
@@ -47,7 +47,6 @@ | |||
47 | #include <nvgpu/linux/dma.h> | 47 | #include <nvgpu/linux/dma.h> |
48 | 48 | ||
49 | #include "gk20a/gk20a.h" | 49 | #include "gk20a/gk20a.h" |
50 | #include "gk20a/hal_gk20a.h" | ||
51 | #include "gk20a/platform_gk20a.h" | 50 | #include "gk20a/platform_gk20a.h" |
52 | #include "gk20a/gk20a_scale.h" | 51 | #include "gk20a/gk20a_scale.h" |
53 | #include "gm20b/clk_gm20b.h" | 52 | #include "gm20b/clk_gm20b.h" |
@@ -232,66 +231,6 @@ static unsigned long gk20a_tegra_get_emc_rate(struct gk20a *g, | |||
232 | } | 231 | } |
233 | 232 | ||
234 | /* | 233 | /* |
235 | * gk20a_tegra_postscale(profile, freq) | ||
236 | * | ||
237 | * This function sets emc frequency based on current gpu frequency | ||
238 | */ | ||
239 | |||
240 | static void gk20a_tegra_postscale(struct device *dev, | ||
241 | unsigned long freq) | ||
242 | { | ||
243 | struct gk20a_platform *platform = dev_get_drvdata(dev); | ||
244 | struct gk20a_scale_profile *profile = platform->g->scale_profile; | ||
245 | struct gk20a_emc_params *emc_params = profile->private_data; | ||
246 | struct gk20a *g = get_gk20a(dev); | ||
247 | struct clk *emc_clk = platform->clk[2]; | ||
248 | enum tegra_chipid chip_id = tegra_get_chip_id(); | ||
249 | unsigned long emc_target; | ||
250 | unsigned long emc_freq_lower, emc_freq_upper, emc_freq_rounded; | ||
251 | |||
252 | emc_target = gk20a_tegra_get_emc_rate(g, emc_params); | ||
253 | |||
254 | switch (chip_id) { | ||
255 | case TEGRA124: | ||
256 | case TEGRA132: | ||
257 | /* T124 and T132 don't apply any rounding. The resulting | ||
258 | * emc frequency gets implicitly rounded up after issuing | ||
259 | * the clock_set_request. | ||
260 | * So explicitly round up the emc target here to achieve | ||
261 | * the same outcome. */ | ||
262 | emc_freq_rounded = | ||
263 | tegra_emc_round_rate_updown(emc_target, true); | ||
264 | break; | ||
265 | |||
266 | case TEGRA210: | ||
267 | emc_freq_lower = (unsigned long) | ||
268 | tegra_emc_round_rate_updown(emc_target, false); | ||
269 | emc_freq_upper = (unsigned long) | ||
270 | tegra_emc_round_rate_updown(emc_target, true); | ||
271 | |||
272 | /* round to the nearest frequency step */ | ||
273 | if (emc_target < (emc_freq_lower + emc_freq_upper) / 2) | ||
274 | emc_freq_rounded = emc_freq_lower; | ||
275 | else | ||
276 | emc_freq_rounded = emc_freq_upper; | ||
277 | break; | ||
278 | |||
279 | default: | ||
280 | /* a proper rounding function needs to be implemented | ||
281 | * for emc in t18x */ | ||
282 | emc_freq_rounded = clk_round_rate(emc_clk, emc_target); | ||
283 | break; | ||
284 | } | ||
285 | |||
286 | /* only change the emc clock if new rounded frequency is different | ||
287 | * from previously set emc rate */ | ||
288 | if (emc_freq_rounded != emc_params->freq_last_set) { | ||
289 | clk_set_rate(emc_clk, emc_freq_rounded); | ||
290 | emc_params->freq_last_set = emc_freq_rounded; | ||
291 | } | ||
292 | } | ||
293 | |||
294 | /* | ||
295 | * gk20a_tegra_prescale(profile, freq) | 234 | * gk20a_tegra_prescale(profile, freq) |
296 | * | 235 | * |
297 | * This function informs EDP about changed constraints. | 236 | * This function informs EDP about changed constraints. |
@@ -619,30 +558,6 @@ err_get_clock: | |||
619 | return ret; | 558 | return ret; |
620 | } | 559 | } |
621 | 560 | ||
622 | static int gk20a_tegra_reset_assert(struct device *dev) | ||
623 | { | ||
624 | struct gk20a_platform *platform = gk20a_get_platform(dev); | ||
625 | |||
626 | if (!platform->clk_reset) | ||
627 | platform->clk_reset = platform->clk[0]; | ||
628 | |||
629 | tegra_periph_reset_assert(platform->clk_reset); | ||
630 | |||
631 | return 0; | ||
632 | } | ||
633 | |||
634 | static int gk20a_tegra_reset_deassert(struct device *dev) | ||
635 | { | ||
636 | struct gk20a_platform *platform = gk20a_get_platform(dev); | ||
637 | |||
638 | if (!platform->clk_reset) | ||
639 | return -EINVAL; | ||
640 | |||
641 | tegra_periph_reset_deassert(platform->clk_reset); | ||
642 | |||
643 | return 0; | ||
644 | } | ||
645 | |||
646 | #if defined(CONFIG_RESET_CONTROLLER) && defined(CONFIG_COMMON_CLK) | 561 | #if defined(CONFIG_RESET_CONTROLLER) && defined(CONFIG_COMMON_CLK) |
647 | static int gm20b_tegra_reset_assert(struct device *dev) | 562 | static int gm20b_tegra_reset_assert(struct device *dev) |
648 | { | 563 | { |
@@ -992,54 +907,6 @@ static int gk20a_clk_get_freqs(struct device *dev, | |||
992 | } | 907 | } |
993 | #endif | 908 | #endif |
994 | 909 | ||
995 | |||
996 | struct gk20a_platform gk20a_tegra_platform = { | ||
997 | .has_syncpoints = true, | ||
998 | .aggressive_sync_destroy_thresh = 64, | ||
999 | |||
1000 | /* power management configuration */ | ||
1001 | .railgate_delay_init = 500, | ||
1002 | .can_railgate_init = true, | ||
1003 | .can_elpg_init = true, | ||
1004 | .enable_slcg = true, | ||
1005 | .enable_blcg = true, | ||
1006 | .enable_elcg = true, | ||
1007 | .enable_elpg = true, | ||
1008 | .enable_aelpg = true, | ||
1009 | .ptimer_src_freq = 12000000, | ||
1010 | |||
1011 | .force_reset_in_do_idle = false, | ||
1012 | |||
1013 | .default_big_page_size = SZ_128K, | ||
1014 | |||
1015 | .ch_wdt_timeout_ms = 7000, | ||
1016 | |||
1017 | .probe = gk20a_tegra_probe, | ||
1018 | .late_probe = gk20a_tegra_late_probe, | ||
1019 | .remove = gk20a_tegra_remove, | ||
1020 | |||
1021 | /* power management callbacks */ | ||
1022 | .suspend = gk20a_tegra_suspend, | ||
1023 | |||
1024 | .busy = gk20a_tegra_busy, | ||
1025 | .idle = gk20a_tegra_idle, | ||
1026 | |||
1027 | .reset_assert = gk20a_tegra_reset_assert, | ||
1028 | .reset_deassert = gk20a_tegra_reset_deassert, | ||
1029 | |||
1030 | /* frequency scaling configuration */ | ||
1031 | .prescale = gk20a_tegra_prescale, | ||
1032 | .postscale = gk20a_tegra_postscale, | ||
1033 | .devfreq_governor = "nvhost_podgov", | ||
1034 | .qos_notify = gk20a_scale_qos_notify, | ||
1035 | |||
1036 | .dump_platform_dependencies = gk20a_tegra_debug_dump, | ||
1037 | |||
1038 | .soc_name = "tegra12x", | ||
1039 | |||
1040 | .unified_memory = true, | ||
1041 | }; | ||
1042 | |||
1043 | struct gk20a_platform gm20b_tegra_platform = { | 910 | struct gk20a_platform gm20b_tegra_platform = { |
1044 | .has_syncpoints = true, | 911 | .has_syncpoints = true, |
1045 | .aggressive_sync_destroy_thresh = 64, | 912 | .aggressive_sync_destroy_thresh = 64, |
@@ -1097,8 +964,6 @@ struct gk20a_platform gm20b_tegra_platform = { | |||
1097 | .prescale = gk20a_tegra_prescale, | 964 | .prescale = gk20a_tegra_prescale, |
1098 | #ifdef CONFIG_TEGRA_BWMGR | 965 | #ifdef CONFIG_TEGRA_BWMGR |
1099 | .postscale = gm20b_tegra_postscale, | 966 | .postscale = gm20b_tegra_postscale, |
1100 | #else | ||
1101 | .postscale = gk20a_tegra_postscale, | ||
1102 | #endif | 967 | #endif |
1103 | .devfreq_governor = "nvhost_podgov", | 968 | .devfreq_governor = "nvhost_podgov", |
1104 | .qos_notify = gk20a_scale_qos_notify, | 969 | .qos_notify = gk20a_scale_qos_notify, |