diff options
Diffstat (limited to 'drivers/gpu/nvgpu/common/linux/nvgpu_mem.c')
-rw-r--r-- | drivers/gpu/nvgpu/common/linux/nvgpu_mem.c | 49 |
1 files changed, 49 insertions, 0 deletions
diff --git a/drivers/gpu/nvgpu/common/linux/nvgpu_mem.c b/drivers/gpu/nvgpu/common/linux/nvgpu_mem.c index e8aea0be..9b9f58e1 100644 --- a/drivers/gpu/nvgpu/common/linux/nvgpu_mem.c +++ b/drivers/gpu/nvgpu/common/linux/nvgpu_mem.c | |||
@@ -102,6 +102,23 @@ void nvgpu_mem_end(struct gk20a *g, struct nvgpu_mem *mem) | |||
102 | mem->cpu_va = NULL; | 102 | mem->cpu_va = NULL; |
103 | } | 103 | } |
104 | 104 | ||
105 | static void pramin_access_batch_rd_n(struct gk20a *g, u32 start, u32 words, u32 **arg) | ||
106 | { | ||
107 | u32 r = start, *dest_u32 = *arg; | ||
108 | |||
109 | if (!g->regs) { | ||
110 | __gk20a_warn_on_no_regs(); | ||
111 | return; | ||
112 | } | ||
113 | |||
114 | while (words--) { | ||
115 | *dest_u32++ = gk20a_readl(g, r); | ||
116 | r += sizeof(u32); | ||
117 | } | ||
118 | |||
119 | *arg = dest_u32; | ||
120 | } | ||
121 | |||
105 | u32 nvgpu_mem_rd32(struct gk20a *g, struct nvgpu_mem *mem, u32 w) | 122 | u32 nvgpu_mem_rd32(struct gk20a *g, struct nvgpu_mem *mem, u32 w) |
106 | { | 123 | { |
107 | u32 data = 0; | 124 | u32 data = 0; |
@@ -162,6 +179,23 @@ void nvgpu_mem_rd_n(struct gk20a *g, struct nvgpu_mem *mem, | |||
162 | } | 179 | } |
163 | } | 180 | } |
164 | 181 | ||
182 | static void pramin_access_batch_wr_n(struct gk20a *g, u32 start, u32 words, u32 **arg) | ||
183 | { | ||
184 | u32 r = start, *src_u32 = *arg; | ||
185 | |||
186 | if (!g->regs) { | ||
187 | __gk20a_warn_on_no_regs(); | ||
188 | return; | ||
189 | } | ||
190 | |||
191 | while (words--) { | ||
192 | writel_relaxed(*src_u32++, g->regs + r); | ||
193 | r += sizeof(u32); | ||
194 | } | ||
195 | |||
196 | *arg = src_u32; | ||
197 | } | ||
198 | |||
165 | void nvgpu_mem_wr32(struct gk20a *g, struct nvgpu_mem *mem, u32 w, u32 data) | 199 | void nvgpu_mem_wr32(struct gk20a *g, struct nvgpu_mem *mem, u32 w, u32 data) |
166 | { | 200 | { |
167 | if (mem->aperture == APERTURE_SYSMEM && !g->mm.force_pramin) { | 201 | if (mem->aperture == APERTURE_SYSMEM && !g->mm.force_pramin) { |
@@ -219,6 +253,21 @@ void nvgpu_mem_wr_n(struct gk20a *g, struct nvgpu_mem *mem, u32 offset, | |||
219 | } | 253 | } |
220 | } | 254 | } |
221 | 255 | ||
256 | static void pramin_access_batch_set(struct gk20a *g, u32 start, u32 words, u32 **arg) | ||
257 | { | ||
258 | u32 r = start, repeat = **arg; | ||
259 | |||
260 | if (!g->regs) { | ||
261 | __gk20a_warn_on_no_regs(); | ||
262 | return; | ||
263 | } | ||
264 | |||
265 | while (words--) { | ||
266 | writel_relaxed(repeat, g->regs + r); | ||
267 | r += sizeof(u32); | ||
268 | } | ||
269 | } | ||
270 | |||
222 | void nvgpu_memset(struct gk20a *g, struct nvgpu_mem *mem, u32 offset, | 271 | void nvgpu_memset(struct gk20a *g, struct nvgpu_mem *mem, u32 offset, |
223 | u32 c, u32 size) | 272 | u32 c, u32 size) |
224 | { | 273 | { |