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path: root/drivers/gpu/nvgpu/common/linux/ioctl_tsg.c
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Diffstat (limited to 'drivers/gpu/nvgpu/common/linux/ioctl_tsg.c')
-rw-r--r--drivers/gpu/nvgpu/common/linux/ioctl_tsg.c21
1 files changed, 11 insertions, 10 deletions
diff --git a/drivers/gpu/nvgpu/common/linux/ioctl_tsg.c b/drivers/gpu/nvgpu/common/linux/ioctl_tsg.c
index be2315bd..d0bfd55a 100644
--- a/drivers/gpu/nvgpu/common/linux/ioctl_tsg.c
+++ b/drivers/gpu/nvgpu/common/linux/ioctl_tsg.c
@@ -175,6 +175,7 @@ void gk20a_tsg_event_id_post_event(struct tsg_gk20a *tsg,
175 struct gk20a_event_id_data *event_id_data; 175 struct gk20a_event_id_data *event_id_data;
176 u32 event_id; 176 u32 event_id;
177 int err = 0; 177 int err = 0;
178 struct gk20a *g = tsg->g;
178 179
179 event_id = nvgpu_event_id_to_ioctl_channel_event_id(__event_id); 180 event_id = nvgpu_event_id_to_ioctl_channel_event_id(__event_id);
180 if (event_id >= NVGPU_IOCTL_CHANNEL_EVENT_ID_MAX) 181 if (event_id >= NVGPU_IOCTL_CHANNEL_EVENT_ID_MAX)
@@ -187,7 +188,7 @@ void gk20a_tsg_event_id_post_event(struct tsg_gk20a *tsg,
187 188
188 nvgpu_mutex_acquire(&event_id_data->lock); 189 nvgpu_mutex_acquire(&event_id_data->lock);
189 190
190 gk20a_dbg_info( 191 nvgpu_log_info(g,
191 "posting event for event_id=%d on tsg=%d\n", 192 "posting event for event_id=%d on tsg=%d\n",
192 event_id, tsg->tsgid); 193 event_id, tsg->tsgid);
193 event_id_data->event_posted = true; 194 event_id_data->event_posted = true;
@@ -205,14 +206,14 @@ static unsigned int gk20a_event_id_poll(struct file *filep, poll_table *wait)
205 u32 event_id = event_id_data->event_id; 206 u32 event_id = event_id_data->event_id;
206 struct tsg_gk20a *tsg = g->fifo.tsg + event_id_data->id; 207 struct tsg_gk20a *tsg = g->fifo.tsg + event_id_data->id;
207 208
208 gk20a_dbg(gpu_dbg_fn | gpu_dbg_info, ""); 209 nvgpu_log(g, gpu_dbg_fn | gpu_dbg_info, " ");
209 210
210 poll_wait(filep, &event_id_data->event_id_wq.wq, wait); 211 poll_wait(filep, &event_id_data->event_id_wq.wq, wait);
211 212
212 nvgpu_mutex_acquire(&event_id_data->lock); 213 nvgpu_mutex_acquire(&event_id_data->lock);
213 214
214 if (event_id_data->event_posted) { 215 if (event_id_data->event_posted) {
215 gk20a_dbg_info( 216 nvgpu_log_info(g,
216 "found pending event_id=%d on TSG=%d\n", 217 "found pending event_id=%d on TSG=%d\n",
217 event_id, tsg->tsgid); 218 event_id, tsg->tsgid);
218 mask = (POLLPRI | POLLIN); 219 mask = (POLLPRI | POLLIN);
@@ -363,7 +364,7 @@ int nvgpu_ioctl_tsg_open(struct gk20a *g, struct file *filp)
363 364
364 dev = dev_from_gk20a(g); 365 dev = dev_from_gk20a(g);
365 366
366 gk20a_dbg(gpu_dbg_fn, "tsg: %s", dev_name(dev)); 367 nvgpu_log(g, gpu_dbg_fn, "tsg: %s", dev_name(dev));
367 368
368 priv = nvgpu_kmalloc(g, sizeof(*priv)); 369 priv = nvgpu_kmalloc(g, sizeof(*priv));
369 if (!priv) { 370 if (!priv) {
@@ -397,12 +398,12 @@ int nvgpu_ioctl_tsg_dev_open(struct inode *inode, struct file *filp)
397 struct gk20a *g; 398 struct gk20a *g;
398 int ret; 399 int ret;
399 400
400 gk20a_dbg_fn("");
401
402 l = container_of(inode->i_cdev, 401 l = container_of(inode->i_cdev,
403 struct nvgpu_os_linux, tsg.cdev); 402 struct nvgpu_os_linux, tsg.cdev);
404 g = &l->g; 403 g = &l->g;
405 404
405 nvgpu_log_fn(g, " ");
406
406 ret = gk20a_busy(g); 407 ret = gk20a_busy(g);
407 if (ret) { 408 if (ret) {
408 nvgpu_err(g, "failed to power on, %d", ret); 409 nvgpu_err(g, "failed to power on, %d", ret);
@@ -412,7 +413,7 @@ int nvgpu_ioctl_tsg_dev_open(struct inode *inode, struct file *filp)
412 ret = nvgpu_ioctl_tsg_open(&l->g, filp); 413 ret = nvgpu_ioctl_tsg_open(&l->g, filp);
413 414
414 gk20a_idle(g); 415 gk20a_idle(g);
415 gk20a_dbg_fn("done"); 416 nvgpu_log_fn(g, "done");
416 return ret; 417 return ret;
417} 418}
418 419
@@ -445,7 +446,7 @@ static int gk20a_tsg_ioctl_set_runlist_interleave(struct gk20a *g,
445 u32 level = arg->level; 446 u32 level = arg->level;
446 int err; 447 int err;
447 448
448 gk20a_dbg(gpu_dbg_fn | gpu_dbg_sched, "tsgid=%u", tsg->tsgid); 449 nvgpu_log(g, gpu_dbg_fn | gpu_dbg_sched, "tsgid=%u", tsg->tsgid);
449 450
450 nvgpu_mutex_acquire(&sched->control_lock); 451 nvgpu_mutex_acquire(&sched->control_lock);
451 if (sched->control_locked) { 452 if (sched->control_locked) {
@@ -474,7 +475,7 @@ static int gk20a_tsg_ioctl_set_timeslice(struct gk20a *g,
474 struct gk20a_sched_ctrl *sched = &l->sched_ctrl; 475 struct gk20a_sched_ctrl *sched = &l->sched_ctrl;
475 int err; 476 int err;
476 477
477 gk20a_dbg(gpu_dbg_fn | gpu_dbg_sched, "tsgid=%u", tsg->tsgid); 478 nvgpu_log(g, gpu_dbg_fn | gpu_dbg_sched, "tsgid=%u", tsg->tsgid);
478 479
479 nvgpu_mutex_acquire(&sched->control_lock); 480 nvgpu_mutex_acquire(&sched->control_lock);
480 if (sched->control_locked) { 481 if (sched->control_locked) {
@@ -509,7 +510,7 @@ long nvgpu_ioctl_tsg_dev_ioctl(struct file *filp, unsigned int cmd,
509 u8 __maybe_unused buf[NVGPU_TSG_IOCTL_MAX_ARG_SIZE]; 510 u8 __maybe_unused buf[NVGPU_TSG_IOCTL_MAX_ARG_SIZE];
510 int err = 0; 511 int err = 0;
511 512
512 gk20a_dbg_fn("start %d", _IOC_NR(cmd)); 513 nvgpu_log_fn(g, "start %d", _IOC_NR(cmd));
513 514
514 if ((_IOC_TYPE(cmd) != NVGPU_TSG_IOCTL_MAGIC) || 515 if ((_IOC_TYPE(cmd) != NVGPU_TSG_IOCTL_MAGIC) ||
515 (_IOC_NR(cmd) == 0) || 516 (_IOC_NR(cmd) == 0) ||