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path: root/drivers/gpu/nvgpu/common/linux/ioctl_ctrl.c
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Diffstat (limited to 'drivers/gpu/nvgpu/common/linux/ioctl_ctrl.c')
-rw-r--r--drivers/gpu/nvgpu/common/linux/ioctl_ctrl.c11
1 files changed, 0 insertions, 11 deletions
diff --git a/drivers/gpu/nvgpu/common/linux/ioctl_ctrl.c b/drivers/gpu/nvgpu/common/linux/ioctl_ctrl.c
index 2a91b87d..c28bdfdb 100644
--- a/drivers/gpu/nvgpu/common/linux/ioctl_ctrl.c
+++ b/drivers/gpu/nvgpu/common/linux/ioctl_ctrl.c
@@ -20,7 +20,6 @@
20#include <linux/anon_inodes.h> 20#include <linux/anon_inodes.h>
21#include <linux/fs.h> 21#include <linux/fs.h>
22#include <uapi/linux/nvgpu.h> 22#include <uapi/linux/nvgpu.h>
23#include <uapi/linux/nvgpu-t18x.h>
24 23
25#include <nvgpu/bitops.h> 24#include <nvgpu/bitops.h>
26#include <nvgpu/kmem.h> 25#include <nvgpu/kmem.h>
@@ -54,9 +53,7 @@
54struct gk20a_ctrl_priv { 53struct gk20a_ctrl_priv {
55 struct device *dev; 54 struct device *dev;
56 struct gk20a *g; 55 struct gk20a *g;
57#ifdef CONFIG_ARCH_TEGRA_18x_SOC
58 struct nvgpu_clk_session *clk_session; 56 struct nvgpu_clk_session *clk_session;
59#endif
60}; 57};
61 58
62int gk20a_ctrl_dev_open(struct inode *inode, struct file *filp) 59int gk20a_ctrl_dev_open(struct inode *inode, struct file *filp)
@@ -95,9 +92,7 @@ int gk20a_ctrl_dev_open(struct inode *inode, struct file *filp)
95 gk20a_idle(g); 92 gk20a_idle(g);
96 } 93 }
97 94
98#ifdef CONFIG_ARCH_TEGRA_18x_SOC
99 err = nvgpu_clk_arb_init_session(g, &priv->clk_session); 95 err = nvgpu_clk_arb_init_session(g, &priv->clk_session);
100#endif
101free_ref: 96free_ref:
102 if (err) 97 if (err)
103 gk20a_put(g); 98 gk20a_put(g);
@@ -110,10 +105,8 @@ int gk20a_ctrl_dev_release(struct inode *inode, struct file *filp)
110 105
111 gk20a_dbg_fn(""); 106 gk20a_dbg_fn("");
112 107
113#ifdef CONFIG_ARCH_TEGRA_18x_SOC
114 if (priv->clk_session) 108 if (priv->clk_session)
115 nvgpu_clk_arb_release_session(g, priv->clk_session); 109 nvgpu_clk_arb_release_session(g, priv->clk_session);
116#endif
117 110
118 gk20a_put(g); 111 gk20a_put(g);
119 nvgpu_kfree(g, priv); 112 nvgpu_kfree(g, priv);
@@ -944,7 +937,6 @@ static int nvgpu_gpu_get_memory_state(struct gk20a *g,
944 return err; 937 return err;
945} 938}
946 939
947#ifdef CONFIG_ARCH_TEGRA_18x_SOC
948static int nvgpu_gpu_clk_get_vf_points(struct gk20a *g, 940static int nvgpu_gpu_clk_get_vf_points(struct gk20a *g,
949 struct gk20a_ctrl_priv *priv, 941 struct gk20a_ctrl_priv *priv,
950 struct nvgpu_gpu_clk_vf_points_args *args) 942 struct nvgpu_gpu_clk_vf_points_args *args)
@@ -1402,7 +1394,6 @@ static int nvgpu_gpu_get_temperature(struct gk20a *g,
1402 1394
1403 return err; 1395 return err;
1404} 1396}
1405#endif
1406 1397
1407static int nvgpu_gpu_set_therm_alert_limit(struct gk20a *g, 1398static int nvgpu_gpu_set_therm_alert_limit(struct gk20a *g,
1408 struct nvgpu_gpu_set_therm_alert_limit_args *args) 1399 struct nvgpu_gpu_set_therm_alert_limit_args *args)
@@ -1798,7 +1789,6 @@ long gk20a_ctrl_dev_ioctl(struct file *filp, unsigned int cmd, unsigned long arg
1798 (struct nvgpu_gpu_get_memory_state_args *)buf); 1789 (struct nvgpu_gpu_get_memory_state_args *)buf);
1799 break; 1790 break;
1800 1791
1801#ifdef CONFIG_ARCH_TEGRA_18x_SOC
1802 case NVGPU_GPU_IOCTL_CLK_GET_RANGE: 1792 case NVGPU_GPU_IOCTL_CLK_GET_RANGE:
1803 err = nvgpu_gpu_clk_get_range(g, priv, 1793 err = nvgpu_gpu_clk_get_range(g, priv,
1804 (struct nvgpu_gpu_clk_range_args *)buf); 1794 (struct nvgpu_gpu_clk_range_args *)buf);
@@ -1843,7 +1833,6 @@ long gk20a_ctrl_dev_ioctl(struct file *filp, unsigned int cmd, unsigned long arg
1843 err = nvgpu_gpu_get_temperature(g, 1833 err = nvgpu_gpu_get_temperature(g,
1844 (struct nvgpu_gpu_get_temperature_args *)buf); 1834 (struct nvgpu_gpu_get_temperature_args *)buf);
1845 break; 1835 break;
1846#endif
1847 1836
1848 case NVGPU_GPU_IOCTL_SET_THERM_ALERT_LIMIT: 1837 case NVGPU_GPU_IOCTL_SET_THERM_ALERT_LIMIT:
1849 err = nvgpu_gpu_set_therm_alert_limit(g, 1838 err = nvgpu_gpu_set_therm_alert_limit(g,