diff options
Diffstat (limited to 'drivers/gpu/nvgpu/common/linux/ioctl_ctrl.c')
-rw-r--r-- | drivers/gpu/nvgpu/common/linux/ioctl_ctrl.c | 43 |
1 files changed, 32 insertions, 11 deletions
diff --git a/drivers/gpu/nvgpu/common/linux/ioctl_ctrl.c b/drivers/gpu/nvgpu/common/linux/ioctl_ctrl.c index e7da0978..b40efc0f 100644 --- a/drivers/gpu/nvgpu/common/linux/ioctl_ctrl.c +++ b/drivers/gpu/nvgpu/common/linux/ioctl_ctrl.c | |||
@@ -968,6 +968,20 @@ static int nvgpu_gpu_get_memory_state(struct gk20a *g, | |||
968 | return err; | 968 | return err; |
969 | } | 969 | } |
970 | 970 | ||
971 | static u32 nvgpu_gpu_convert_clk_domain(u32 clk_domain) | ||
972 | { | ||
973 | u32 domain = 0; | ||
974 | |||
975 | if (clk_domain == NVGPU_GPU_CLK_DOMAIN_MCLK) | ||
976 | domain = NVGPU_CLK_DOMAIN_MCLK; | ||
977 | else if (clk_domain == NVGPU_GPU_CLK_DOMAIN_GPCCLK) | ||
978 | domain = NVGPU_CLK_DOMAIN_GPCCLK; | ||
979 | else | ||
980 | domain = NVGPU_CLK_DOMAIN_MAX + 1; | ||
981 | |||
982 | return domain; | ||
983 | } | ||
984 | |||
971 | static int nvgpu_gpu_clk_get_vf_points(struct gk20a *g, | 985 | static int nvgpu_gpu_clk_get_vf_points(struct gk20a *g, |
972 | struct gk20a_ctrl_priv *priv, | 986 | struct gk20a_ctrl_priv *priv, |
973 | struct nvgpu_gpu_clk_vf_points_args *args) | 987 | struct nvgpu_gpu_clk_vf_points_args *args) |
@@ -993,11 +1007,13 @@ static int nvgpu_gpu_clk_get_vf_points(struct gk20a *g, | |||
993 | clk_domains = nvgpu_clk_arb_get_arbiter_clk_domains(g); | 1007 | clk_domains = nvgpu_clk_arb_get_arbiter_clk_domains(g); |
994 | args->num_entries = 0; | 1008 | args->num_entries = 0; |
995 | 1009 | ||
996 | if (!nvgpu_clk_arb_is_valid_domain(g, args->clk_domain)) | 1010 | if (!nvgpu_clk_arb_is_valid_domain(g, |
1011 | nvgpu_gpu_convert_clk_domain(args->clk_domain))) | ||
997 | return -EINVAL; | 1012 | return -EINVAL; |
998 | 1013 | ||
999 | err = nvgpu_clk_arb_get_arbiter_clk_f_points(g, | 1014 | err = nvgpu_clk_arb_get_arbiter_clk_f_points(g, |
1000 | args->clk_domain, &max_points, NULL); | 1015 | nvgpu_gpu_convert_clk_domain(args->clk_domain), |
1016 | &max_points, NULL); | ||
1001 | if (err) | 1017 | if (err) |
1002 | return err; | 1018 | return err; |
1003 | 1019 | ||
@@ -1009,7 +1025,8 @@ static int nvgpu_gpu_clk_get_vf_points(struct gk20a *g, | |||
1009 | if (args->max_entries < max_points) | 1025 | if (args->max_entries < max_points) |
1010 | return -EINVAL; | 1026 | return -EINVAL; |
1011 | 1027 | ||
1012 | err = nvgpu_clk_arb_get_arbiter_clk_range(g, args->clk_domain, | 1028 | err = nvgpu_clk_arb_get_arbiter_clk_range(g, |
1029 | nvgpu_gpu_convert_clk_domain(args->clk_domain), | ||
1013 | &min_mhz, &max_mhz); | 1030 | &min_mhz, &max_mhz); |
1014 | if (err) | 1031 | if (err) |
1015 | return err; | 1032 | return err; |
@@ -1019,7 +1036,8 @@ static int nvgpu_gpu_clk_get_vf_points(struct gk20a *g, | |||
1019 | return -ENOMEM; | 1036 | return -ENOMEM; |
1020 | 1037 | ||
1021 | err = nvgpu_clk_arb_get_arbiter_clk_f_points(g, | 1038 | err = nvgpu_clk_arb_get_arbiter_clk_f_points(g, |
1022 | args->clk_domain, &max_points, fpoints); | 1039 | nvgpu_gpu_convert_clk_domain(args->clk_domain), |
1040 | &max_points, fpoints); | ||
1023 | if (err) | 1041 | if (err) |
1024 | goto fail; | 1042 | goto fail; |
1025 | 1043 | ||
@@ -1117,7 +1135,7 @@ static int nvgpu_gpu_clk_get_range(struct gk20a *g, | |||
1117 | 1135 | ||
1118 | clk_range.flags = 0; | 1136 | clk_range.flags = 0; |
1119 | err = nvgpu_clk_arb_get_arbiter_clk_range(g, | 1137 | err = nvgpu_clk_arb_get_arbiter_clk_range(g, |
1120 | clk_range.clk_domain, | 1138 | nvgpu_gpu_convert_clk_domain(clk_range.clk_domain), |
1121 | &min_mhz, &max_mhz); | 1139 | &min_mhz, &max_mhz); |
1122 | clk_range.min_hz = MHZ_TO_HZ(min_mhz); | 1140 | clk_range.min_hz = MHZ_TO_HZ(min_mhz); |
1123 | clk_range.max_hz = MHZ_TO_HZ(max_mhz); | 1141 | clk_range.max_hz = MHZ_TO_HZ(max_mhz); |
@@ -1135,7 +1153,6 @@ static int nvgpu_gpu_clk_get_range(struct gk20a *g, | |||
1135 | return 0; | 1153 | return 0; |
1136 | } | 1154 | } |
1137 | 1155 | ||
1138 | |||
1139 | static int nvgpu_gpu_clk_set_info(struct gk20a *g, | 1156 | static int nvgpu_gpu_clk_set_info(struct gk20a *g, |
1140 | struct gk20a_ctrl_priv *priv, | 1157 | struct gk20a_ctrl_priv *priv, |
1141 | struct nvgpu_gpu_clk_set_info_args *args) | 1158 | struct nvgpu_gpu_clk_set_info_args *args) |
@@ -1167,7 +1184,8 @@ static int nvgpu_gpu_clk_set_info(struct gk20a *g, | |||
1167 | if (copy_from_user(&clk_info, entry, sizeof(clk_info))) | 1184 | if (copy_from_user(&clk_info, entry, sizeof(clk_info))) |
1168 | return -EFAULT; | 1185 | return -EFAULT; |
1169 | 1186 | ||
1170 | if (!nvgpu_clk_arb_is_valid_domain(g, clk_info.clk_domain)) | 1187 | if (!nvgpu_clk_arb_is_valid_domain(g, |
1188 | nvgpu_gpu_convert_clk_domain(clk_info.clk_domain))) | ||
1171 | return -EINVAL; | 1189 | return -EINVAL; |
1172 | } | 1190 | } |
1173 | 1191 | ||
@@ -1186,7 +1204,7 @@ static int nvgpu_gpu_clk_set_info(struct gk20a *g, | |||
1186 | freq_mhz = HZ_TO_MHZ(clk_info.freq_hz); | 1204 | freq_mhz = HZ_TO_MHZ(clk_info.freq_hz); |
1187 | 1205 | ||
1188 | nvgpu_clk_arb_set_session_target_mhz(session, fd, | 1206 | nvgpu_clk_arb_set_session_target_mhz(session, fd, |
1189 | clk_info.clk_domain, freq_mhz); | 1207 | nvgpu_gpu_convert_clk_domain(clk_info.clk_domain), freq_mhz); |
1190 | } | 1208 | } |
1191 | 1209 | ||
1192 | ret = nvgpu_clk_arb_commit_request_fd(g, session, fd); | 1210 | ret = nvgpu_clk_arb_commit_request_fd(g, session, fd); |
@@ -1261,15 +1279,18 @@ static int nvgpu_gpu_clk_get_info(struct gk20a *g, | |||
1261 | switch (clk_info.clk_type) { | 1279 | switch (clk_info.clk_type) { |
1262 | case NVGPU_GPU_CLK_TYPE_TARGET: | 1280 | case NVGPU_GPU_CLK_TYPE_TARGET: |
1263 | err = nvgpu_clk_arb_get_session_target_mhz(session, | 1281 | err = nvgpu_clk_arb_get_session_target_mhz(session, |
1264 | clk_info.clk_domain, &freq_mhz); | 1282 | nvgpu_gpu_convert_clk_domain(clk_info.clk_domain), |
1283 | &freq_mhz); | ||
1265 | break; | 1284 | break; |
1266 | case NVGPU_GPU_CLK_TYPE_ACTUAL: | 1285 | case NVGPU_GPU_CLK_TYPE_ACTUAL: |
1267 | err = nvgpu_clk_arb_get_arbiter_actual_mhz(g, | 1286 | err = nvgpu_clk_arb_get_arbiter_actual_mhz(g, |
1268 | clk_info.clk_domain, &freq_mhz); | 1287 | nvgpu_gpu_convert_clk_domain(clk_info.clk_domain), |
1288 | &freq_mhz); | ||
1269 | break; | 1289 | break; |
1270 | case NVGPU_GPU_CLK_TYPE_EFFECTIVE: | 1290 | case NVGPU_GPU_CLK_TYPE_EFFECTIVE: |
1271 | err = nvgpu_clk_arb_get_arbiter_effective_mhz(g, | 1291 | err = nvgpu_clk_arb_get_arbiter_effective_mhz(g, |
1272 | clk_info.clk_domain, &freq_mhz); | 1292 | nvgpu_gpu_convert_clk_domain(clk_info.clk_domain), |
1293 | &freq_mhz); | ||
1273 | break; | 1294 | break; |
1274 | default: | 1295 | default: |
1275 | freq_mhz = 0; | 1296 | freq_mhz = 0; |