diff options
Diffstat (limited to 'drivers/gpu/nvgpu/common/linux/ioctl_channel.c')
-rw-r--r-- | drivers/gpu/nvgpu/common/linux/ioctl_channel.c | 22 |
1 files changed, 12 insertions, 10 deletions
diff --git a/drivers/gpu/nvgpu/common/linux/ioctl_channel.c b/drivers/gpu/nvgpu/common/linux/ioctl_channel.c index 06dfb180..606c5251 100644 --- a/drivers/gpu/nvgpu/common/linux/ioctl_channel.c +++ b/drivers/gpu/nvgpu/common/linux/ioctl_channel.c | |||
@@ -476,7 +476,7 @@ static int __gk20a_channel_open(struct gk20a *g, | |||
476 | struct channel_gk20a *ch; | 476 | struct channel_gk20a *ch; |
477 | struct channel_priv *priv; | 477 | struct channel_priv *priv; |
478 | 478 | ||
479 | gk20a_dbg_fn(""); | 479 | nvgpu_log_fn(g, " "); |
480 | 480 | ||
481 | g = gk20a_get(g); | 481 | g = gk20a_get(g); |
482 | if (!g) | 482 | if (!g) |
@@ -529,10 +529,10 @@ int gk20a_channel_open(struct inode *inode, struct file *filp) | |||
529 | struct gk20a *g = &l->g; | 529 | struct gk20a *g = &l->g; |
530 | int ret; | 530 | int ret; |
531 | 531 | ||
532 | gk20a_dbg_fn("start"); | 532 | nvgpu_log_fn(g, "start"); |
533 | ret = __gk20a_channel_open(g, filp, -1); | 533 | ret = __gk20a_channel_open(g, filp, -1); |
534 | 534 | ||
535 | gk20a_dbg_fn("end"); | 535 | nvgpu_log_fn(g, "end"); |
536 | return ret; | 536 | return ret; |
537 | } | 537 | } |
538 | 538 | ||
@@ -676,7 +676,7 @@ static int gk20a_channel_wait(struct channel_gk20a *ch, | |||
676 | int remain, ret = 0; | 676 | int remain, ret = 0; |
677 | u64 end; | 677 | u64 end; |
678 | 678 | ||
679 | gk20a_dbg_fn(""); | 679 | nvgpu_log_fn(g, " "); |
680 | 680 | ||
681 | if (ch->has_timedout) | 681 | if (ch->has_timedout) |
682 | return -ETIMEDOUT; | 682 | return -ETIMEDOUT; |
@@ -760,7 +760,7 @@ static int gk20a_channel_zcull_bind(struct channel_gk20a *ch, | |||
760 | struct gk20a *g = ch->g; | 760 | struct gk20a *g = ch->g; |
761 | struct gr_gk20a *gr = &g->gr; | 761 | struct gr_gk20a *gr = &g->gr; |
762 | 762 | ||
763 | gk20a_dbg_fn(""); | 763 | nvgpu_log_fn(gr->g, " "); |
764 | 764 | ||
765 | return g->ops.gr.bind_ctxsw_zcull(g, gr, ch, | 765 | return g->ops.gr.bind_ctxsw_zcull(g, gr, ch, |
766 | args->gpu_va, args->mode); | 766 | args->gpu_va, args->mode); |
@@ -775,9 +775,10 @@ static int gk20a_ioctl_channel_submit_gpfifo( | |||
775 | struct fifo_profile_gk20a *profile = NULL; | 775 | struct fifo_profile_gk20a *profile = NULL; |
776 | u32 submit_flags = 0; | 776 | u32 submit_flags = 0; |
777 | int fd = -1; | 777 | int fd = -1; |
778 | struct gk20a *g = ch->g; | ||
778 | 779 | ||
779 | int ret = 0; | 780 | int ret = 0; |
780 | gk20a_dbg_fn(""); | 781 | nvgpu_log_fn(g, " "); |
781 | 782 | ||
782 | #ifdef CONFIG_DEBUG_FS | 783 | #ifdef CONFIG_DEBUG_FS |
783 | profile = gk20a_fifo_profile_acquire(ch->g); | 784 | profile = gk20a_fifo_profile_acquire(ch->g); |
@@ -1064,8 +1065,9 @@ long gk20a_channel_ioctl(struct file *filp, | |||
1064 | struct device *dev = dev_from_gk20a(ch->g); | 1065 | struct device *dev = dev_from_gk20a(ch->g); |
1065 | u8 buf[NVGPU_IOCTL_CHANNEL_MAX_ARG_SIZE] = {0}; | 1066 | u8 buf[NVGPU_IOCTL_CHANNEL_MAX_ARG_SIZE] = {0}; |
1066 | int err = 0; | 1067 | int err = 0; |
1068 | struct gk20a *g = ch->g; | ||
1067 | 1069 | ||
1068 | gk20a_dbg_fn("start %d", _IOC_NR(cmd)); | 1070 | nvgpu_log_fn(g, "start %d", _IOC_NR(cmd)); |
1069 | 1071 | ||
1070 | if ((_IOC_TYPE(cmd) != NVGPU_IOCTL_MAGIC) || | 1072 | if ((_IOC_TYPE(cmd) != NVGPU_IOCTL_MAGIC) || |
1071 | (_IOC_NR(cmd) == 0) || | 1073 | (_IOC_NR(cmd) == 0) || |
@@ -1224,7 +1226,7 @@ long gk20a_channel_ioctl(struct file *filp, | |||
1224 | { | 1226 | { |
1225 | u32 timeout = | 1227 | u32 timeout = |
1226 | (u32)((struct nvgpu_set_timeout_args *)buf)->timeout; | 1228 | (u32)((struct nvgpu_set_timeout_args *)buf)->timeout; |
1227 | gk20a_dbg(gpu_dbg_gpu_dbg, "setting timeout (%d ms) for chid %d", | 1229 | nvgpu_log(g, gpu_dbg_gpu_dbg, "setting timeout (%d ms) for chid %d", |
1228 | timeout, ch->chid); | 1230 | timeout, ch->chid); |
1229 | ch->timeout_ms_max = timeout; | 1231 | ch->timeout_ms_max = timeout; |
1230 | gk20a_channel_trace_sched_param( | 1232 | gk20a_channel_trace_sched_param( |
@@ -1238,7 +1240,7 @@ long gk20a_channel_ioctl(struct file *filp, | |||
1238 | bool timeout_debug_dump = !((u32) | 1240 | bool timeout_debug_dump = !((u32) |
1239 | ((struct nvgpu_set_timeout_ex_args *)buf)->flags & | 1241 | ((struct nvgpu_set_timeout_ex_args *)buf)->flags & |
1240 | (1 << NVGPU_TIMEOUT_FLAG_DISABLE_DUMP)); | 1242 | (1 << NVGPU_TIMEOUT_FLAG_DISABLE_DUMP)); |
1241 | gk20a_dbg(gpu_dbg_gpu_dbg, "setting timeout (%d ms) for chid %d", | 1243 | nvgpu_log(g, gpu_dbg_gpu_dbg, "setting timeout (%d ms) for chid %d", |
1242 | timeout, ch->chid); | 1244 | timeout, ch->chid); |
1243 | ch->timeout_ms_max = timeout; | 1245 | ch->timeout_ms_max = timeout; |
1244 | ch->timeout_debug_dump = timeout_debug_dump; | 1246 | ch->timeout_debug_dump = timeout_debug_dump; |
@@ -1367,7 +1369,7 @@ long gk20a_channel_ioctl(struct file *filp, | |||
1367 | 1369 | ||
1368 | gk20a_channel_put(ch); | 1370 | gk20a_channel_put(ch); |
1369 | 1371 | ||
1370 | gk20a_dbg_fn("end"); | 1372 | nvgpu_log_fn(g, "end"); |
1371 | 1373 | ||
1372 | return err; | 1374 | return err; |
1373 | } | 1375 | } |