summaryrefslogtreecommitdiffstats
path: root/drivers/gpu/nvgpu/common/linux/ioctl.c
diff options
context:
space:
mode:
Diffstat (limited to 'drivers/gpu/nvgpu/common/linux/ioctl.c')
-rw-r--r--drivers/gpu/nvgpu/common/linux/ioctl.c285
1 files changed, 285 insertions, 0 deletions
diff --git a/drivers/gpu/nvgpu/common/linux/ioctl.c b/drivers/gpu/nvgpu/common/linux/ioctl.c
new file mode 100644
index 00000000..083d6102
--- /dev/null
+++ b/drivers/gpu/nvgpu/common/linux/ioctl.c
@@ -0,0 +1,285 @@
1/*
2 * NVGPU IOCTLs
3 *
4 * Copyright (c) 2011-2017, NVIDIA CORPORATION. All rights reserved.
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms and conditions of the GNU General Public License,
8 * version 2, as published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 * more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program. If not, see <http://www.gnu.org/licenses/>.
17 */
18
19#include <linux/file.h>
20
21#include <nvgpu/nvgpu_common.h>
22
23#include "gk20a/gk20a.h"
24#include "gk20a/dbg_gpu_gk20a.h"
25#include "gk20a/ctxsw_trace_gk20a.h"
26#include "gk20a/channel_gk20a.h"
27#include "gk20a/ctrl_gk20a.h"
28#include "gk20a/as_gk20a.h"
29#include "gk20a/tsg_gk20a.h"
30
31#define GK20A_NUM_CDEVS 7
32
33const struct file_operations gk20a_channel_ops = {
34 .owner = THIS_MODULE,
35 .release = gk20a_channel_release,
36 .open = gk20a_channel_open,
37#ifdef CONFIG_COMPAT
38 .compat_ioctl = gk20a_channel_ioctl,
39#endif
40 .unlocked_ioctl = gk20a_channel_ioctl,
41};
42
43static const struct file_operations gk20a_ctrl_ops = {
44 .owner = THIS_MODULE,
45 .release = gk20a_ctrl_dev_release,
46 .open = gk20a_ctrl_dev_open,
47 .unlocked_ioctl = gk20a_ctrl_dev_ioctl,
48#ifdef CONFIG_COMPAT
49 .compat_ioctl = gk20a_ctrl_dev_ioctl,
50#endif
51};
52
53static const struct file_operations gk20a_dbg_ops = {
54 .owner = THIS_MODULE,
55 .release = gk20a_dbg_gpu_dev_release,
56 .open = gk20a_dbg_gpu_dev_open,
57 .unlocked_ioctl = gk20a_dbg_gpu_dev_ioctl,
58 .poll = gk20a_dbg_gpu_dev_poll,
59#ifdef CONFIG_COMPAT
60 .compat_ioctl = gk20a_dbg_gpu_dev_ioctl,
61#endif
62};
63
64static const struct file_operations gk20a_as_ops = {
65 .owner = THIS_MODULE,
66 .release = gk20a_as_dev_release,
67 .open = gk20a_as_dev_open,
68#ifdef CONFIG_COMPAT
69 .compat_ioctl = gk20a_as_dev_ioctl,
70#endif
71 .unlocked_ioctl = gk20a_as_dev_ioctl,
72};
73
74/*
75 * Note: We use a different 'open' to trigger handling of the profiler session.
76 * Most of the code is shared between them... Though, at some point if the
77 * code does get too tangled trying to handle each in the same path we can
78 * separate them cleanly.
79 */
80static const struct file_operations gk20a_prof_ops = {
81 .owner = THIS_MODULE,
82 .release = gk20a_dbg_gpu_dev_release,
83 .open = gk20a_prof_gpu_dev_open,
84 .unlocked_ioctl = gk20a_dbg_gpu_dev_ioctl,
85#ifdef CONFIG_COMPAT
86 .compat_ioctl = gk20a_dbg_gpu_dev_ioctl,
87#endif
88};
89
90static const struct file_operations gk20a_tsg_ops = {
91 .owner = THIS_MODULE,
92 .release = gk20a_tsg_dev_release,
93 .open = gk20a_tsg_dev_open,
94#ifdef CONFIG_COMPAT
95 .compat_ioctl = gk20a_tsg_dev_ioctl,
96#endif
97 .unlocked_ioctl = gk20a_tsg_dev_ioctl,
98};
99
100static const struct file_operations gk20a_ctxsw_ops = {
101 .owner = THIS_MODULE,
102 .release = gk20a_ctxsw_dev_release,
103 .open = gk20a_ctxsw_dev_open,
104#ifdef CONFIG_COMPAT
105 .compat_ioctl = gk20a_ctxsw_dev_ioctl,
106#endif
107 .unlocked_ioctl = gk20a_ctxsw_dev_ioctl,
108 .poll = gk20a_ctxsw_dev_poll,
109 .read = gk20a_ctxsw_dev_read,
110 .mmap = gk20a_ctxsw_dev_mmap,
111};
112
113static const struct file_operations gk20a_sched_ops = {
114 .owner = THIS_MODULE,
115 .release = gk20a_sched_dev_release,
116 .open = gk20a_sched_dev_open,
117#ifdef CONFIG_COMPAT
118 .compat_ioctl = gk20a_sched_dev_ioctl,
119#endif
120 .unlocked_ioctl = gk20a_sched_dev_ioctl,
121 .poll = gk20a_sched_dev_poll,
122 .read = gk20a_sched_dev_read,
123};
124
125static int gk20a_create_device(
126 struct device *dev, int devno,
127 const char *interface_name, const char *cdev_name,
128 struct cdev *cdev, struct device **out,
129 const struct file_operations *ops,
130 struct class *class)
131{
132 struct device *subdev;
133 int err;
134
135 gk20a_dbg_fn("");
136
137 cdev_init(cdev, ops);
138 cdev->owner = THIS_MODULE;
139
140 err = cdev_add(cdev, devno, 1);
141 if (err) {
142 dev_err(dev, "failed to add %s cdev\n", cdev_name);
143 return err;
144 }
145
146 subdev = device_create(class, NULL, devno, NULL,
147 interface_name, cdev_name);
148
149 if (IS_ERR(subdev)) {
150 err = PTR_ERR(dev);
151 cdev_del(cdev);
152 dev_err(dev, "failed to create %s device for %s\n",
153 cdev_name, dev_name(dev));
154 return err;
155 }
156
157 *out = subdev;
158 return 0;
159}
160
161void gk20a_user_deinit(struct device *dev, struct class *class)
162{
163 struct gk20a *g = gk20a_from_dev(dev);
164
165 if (g->channel.node) {
166 device_destroy(class, g->channel.cdev.dev);
167 cdev_del(&g->channel.cdev);
168 }
169
170 if (g->as.node) {
171 device_destroy(class, g->as.cdev.dev);
172 cdev_del(&g->as.cdev);
173 }
174
175 if (g->ctrl.node) {
176 device_destroy(class, g->ctrl.cdev.dev);
177 cdev_del(&g->ctrl.cdev);
178 }
179
180 if (g->dbg.node) {
181 device_destroy(class, g->dbg.cdev.dev);
182 cdev_del(&g->dbg.cdev);
183 }
184
185 if (g->prof.node) {
186 device_destroy(class, g->prof.cdev.dev);
187 cdev_del(&g->prof.cdev);
188 }
189
190 if (g->tsg.node) {
191 device_destroy(class, g->tsg.cdev.dev);
192 cdev_del(&g->tsg.cdev);
193 }
194
195 if (g->ctxsw.node) {
196 device_destroy(class, g->ctxsw.cdev.dev);
197 cdev_del(&g->ctxsw.cdev);
198 }
199
200 if (g->sched.node) {
201 device_destroy(class, g->sched.cdev.dev);
202 cdev_del(&g->sched.cdev);
203 }
204
205 if (g->cdev_region)
206 unregister_chrdev_region(g->cdev_region, GK20A_NUM_CDEVS);
207}
208
209int gk20a_user_init(struct device *dev, const char *interface_name,
210 struct class *class)
211{
212 int err;
213 dev_t devno;
214 struct gk20a *g = gk20a_from_dev(dev);
215
216 err = alloc_chrdev_region(&devno, 0, GK20A_NUM_CDEVS, dev_name(dev));
217 if (err) {
218 dev_err(dev, "failed to allocate devno\n");
219 goto fail;
220 }
221 g->cdev_region = devno;
222
223 err = gk20a_create_device(dev, devno++, interface_name, "",
224 &g->channel.cdev, &g->channel.node,
225 &gk20a_channel_ops,
226 class);
227 if (err)
228 goto fail;
229
230 err = gk20a_create_device(dev, devno++, interface_name, "-as",
231 &g->as.cdev, &g->as.node,
232 &gk20a_as_ops,
233 class);
234 if (err)
235 goto fail;
236
237 err = gk20a_create_device(dev, devno++, interface_name, "-ctrl",
238 &g->ctrl.cdev, &g->ctrl.node,
239 &gk20a_ctrl_ops,
240 class);
241 if (err)
242 goto fail;
243
244 err = gk20a_create_device(dev, devno++, interface_name, "-dbg",
245 &g->dbg.cdev, &g->dbg.node,
246 &gk20a_dbg_ops,
247 class);
248 if (err)
249 goto fail;
250
251 err = gk20a_create_device(dev, devno++, interface_name, "-prof",
252 &g->prof.cdev, &g->prof.node,
253 &gk20a_prof_ops,
254 class);
255 if (err)
256 goto fail;
257
258 err = gk20a_create_device(dev, devno++, interface_name, "-tsg",
259 &g->tsg.cdev, &g->tsg.node,
260 &gk20a_tsg_ops,
261 class);
262 if (err)
263 goto fail;
264
265#ifdef CONFIG_GK20A_CTXSW_TRACE
266 err = gk20a_create_device(dev, devno++, interface_name, "-ctxsw",
267 &g->ctxsw.cdev, &g->ctxsw.node,
268 &gk20a_ctxsw_ops,
269 class);
270 if (err)
271 goto fail;
272#endif
273
274 err = gk20a_create_device(dev, devno++, interface_name, "-sched",
275 &g->sched.cdev, &g->sched.node,
276 &gk20a_sched_ops,
277 class);
278 if (err)
279 goto fail;
280
281 return 0;
282fail:
283 gk20a_user_deinit(dev, &nvgpu_class);
284 return err;
285}