diff options
Diffstat (limited to 'drivers/gpu/nvgpu/common/linux/io.c')
-rw-r--r-- | drivers/gpu/nvgpu/common/linux/io.c | 110 |
1 files changed, 110 insertions, 0 deletions
diff --git a/drivers/gpu/nvgpu/common/linux/io.c b/drivers/gpu/nvgpu/common/linux/io.c new file mode 100644 index 00000000..04a9fbe8 --- /dev/null +++ b/drivers/gpu/nvgpu/common/linux/io.c | |||
@@ -0,0 +1,110 @@ | |||
1 | /* | ||
2 | * Copyright (c) 2017, NVIDIA CORPORATION. All rights reserved. | ||
3 | * | ||
4 | * This program is free software; you can redistribute it and/or modify it | ||
5 | * under the terms and conditions of the GNU General Public License, | ||
6 | * version 2, as published by the Free Software Foundation. | ||
7 | * | ||
8 | * This program is distributed in the hope it will be useful, but WITHOUT | ||
9 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | ||
10 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | ||
11 | * more details. | ||
12 | */ | ||
13 | |||
14 | #include <nvgpu/io.h> | ||
15 | #include <nvgpu/types.h> | ||
16 | |||
17 | #include "os_linux.h" | ||
18 | #include "gk20a/gk20a.h" | ||
19 | |||
20 | void nvgpu_writel(struct gk20a *g, u32 r, u32 v) | ||
21 | { | ||
22 | struct nvgpu_os_linux *l = nvgpu_os_linux_from_gk20a(g); | ||
23 | |||
24 | if (unlikely(!l->regs)) { | ||
25 | __gk20a_warn_on_no_regs(); | ||
26 | gk20a_dbg(gpu_dbg_reg, "r=0x%x v=0x%x (failed)", r, v); | ||
27 | } else { | ||
28 | writel_relaxed(v, l->regs + r); | ||
29 | nvgpu_smp_wmb(); | ||
30 | gk20a_dbg(gpu_dbg_reg, "r=0x%x v=0x%x", r, v); | ||
31 | } | ||
32 | } | ||
33 | |||
34 | u32 nvgpu_readl(struct gk20a *g, u32 r) | ||
35 | { | ||
36 | struct nvgpu_os_linux *l = nvgpu_os_linux_from_gk20a(g); | ||
37 | u32 v = 0xffffffff; | ||
38 | |||
39 | if (unlikely(!l->regs)) { | ||
40 | __gk20a_warn_on_no_regs(); | ||
41 | gk20a_dbg(gpu_dbg_reg, "r=0x%x v=0x%x (failed)", r, v); | ||
42 | } else { | ||
43 | v = readl(l->regs + r); | ||
44 | if (v == 0xffffffff) | ||
45 | __nvgpu_check_gpu_state(g); | ||
46 | gk20a_dbg(gpu_dbg_reg, "r=0x%x v=0x%x", r, v); | ||
47 | } | ||
48 | |||
49 | return v; | ||
50 | } | ||
51 | |||
52 | void nvgpu_writel_check(struct gk20a *g, u32 r, u32 v) | ||
53 | { | ||
54 | struct nvgpu_os_linux *l = nvgpu_os_linux_from_gk20a(g); | ||
55 | |||
56 | if (unlikely(!l->regs)) { | ||
57 | __gk20a_warn_on_no_regs(); | ||
58 | gk20a_dbg(gpu_dbg_reg, "r=0x%x v=0x%x (failed)", r, v); | ||
59 | } else { | ||
60 | nvgpu_smp_wmb(); | ||
61 | do { | ||
62 | writel_relaxed(v, l->regs + r); | ||
63 | } while (readl(l->regs + r) != v); | ||
64 | gk20a_dbg(gpu_dbg_reg, "r=0x%x v=0x%x", r, v); | ||
65 | } | ||
66 | } | ||
67 | |||
68 | void nvgpu_bar1_writel(struct gk20a *g, u32 b, u32 v) | ||
69 | { | ||
70 | struct nvgpu_os_linux *l = nvgpu_os_linux_from_gk20a(g); | ||
71 | |||
72 | if (unlikely(!l->bar1)) { | ||
73 | __gk20a_warn_on_no_regs(); | ||
74 | gk20a_dbg(gpu_dbg_reg, "b=0x%x v=0x%x (failed)", b, v); | ||
75 | } else { | ||
76 | nvgpu_smp_wmb(); | ||
77 | writel_relaxed(v, l->bar1 + b); | ||
78 | gk20a_dbg(gpu_dbg_reg, "b=0x%x v=0x%x", b, v); | ||
79 | } | ||
80 | } | ||
81 | |||
82 | u32 nvgpu_bar1_readl(struct gk20a *g, u32 b) | ||
83 | { | ||
84 | struct nvgpu_os_linux *l = nvgpu_os_linux_from_gk20a(g); | ||
85 | u32 v = 0xffffffff; | ||
86 | |||
87 | if (unlikely(!l->bar1)) { | ||
88 | __gk20a_warn_on_no_regs(); | ||
89 | gk20a_dbg(gpu_dbg_reg, "b=0x%x v=0x%x (failed)", b, v); | ||
90 | } else { | ||
91 | v = readl(l->bar1 + b); | ||
92 | gk20a_dbg(gpu_dbg_reg, "b=0x%x v=0x%x", b, v); | ||
93 | } | ||
94 | |||
95 | return v; | ||
96 | } | ||
97 | |||
98 | bool nvgpu_io_exists(struct gk20a *g) | ||
99 | { | ||
100 | struct nvgpu_os_linux *l = nvgpu_os_linux_from_gk20a(g); | ||
101 | |||
102 | return l->regs != NULL; | ||
103 | } | ||
104 | |||
105 | bool nvgpu_io_valid_reg(struct gk20a *g, u32 r) | ||
106 | { | ||
107 | struct nvgpu_os_linux *l = nvgpu_os_linux_from_gk20a(g); | ||
108 | |||
109 | return r < resource_size(l->regs); | ||
110 | } | ||