1 files changed, 14 insertions, 5 deletions

diff --git a/drivers/gpu/nvgpu/common/linux/clk.c b/drivers/gpu/nvgpu/common/linux/clk.c
index ea5b023d..8bffc07b 100644
--- a/drivers/gpu/nvgpu/common/linux/clk.c
+++ b/drivers/gpu/nvgpu/common/linux/clk.c
@@ -1,7 +1,7 @@
 /*
  * Linux clock support
  *
- * Copyright (c) 2017, NVIDIA CORPORATION.  All rights reserved.
+ * Copyright (c) 2017-2018, NVIDIA CORPORATION.  All rights reserved.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms and conditions of the GNU General Public License,
@@ -34,9 +34,13 @@ static unsigned long nvgpu_linux_clk_get_rate(struct gk20a *g, u32 api_domain)
         switch (api_domain) {
         case CTRL_CLK_DOMAIN_GPCCLK:
                 if (g->clk.tegra_clk)
-                        ret = clk_get_rate(g->clk.tegra_clk);
+                        ret = g->clk.cached_rate ?
+                                g->clk.cached_rate :
+                                clk_get_rate(g->clk.tegra_clk);
                 else
-                        ret = clk_get_rate(platform->clk[0]);
+                        ret = platform->cached_rate ?
+                                platform->cached_rate :
+                                clk_get_rate(platform->clk[0]);
                 break;
         case CTRL_CLK_DOMAIN_PWRCLK:
                 ret = clk_get_rate(platform->clk[1]);
@@ -58,10 +62,15 @@ static int nvgpu_linux_clk_set_rate(struct gk20a *g,
 
         switch (api_domain) {
         case CTRL_CLK_DOMAIN_GPCCLK:
-                if (g->clk.tegra_clk)
+                if (g->clk.tegra_clk) {
                         ret = clk_set_rate(g->clk.tegra_clk, rate);
-                else
+                        if (!ret)
+                                g->clk.cached_rate = rate;
+                } else {
                         ret = clk_set_rate(platform->clk[0], rate);
+                        if (!ret)
+                                platform->cached_rate = rate;
+                }
                 break;
         case CTRL_CLK_DOMAIN_PWRCLK:
                 ret = clk_set_rate(platform->clk[1], rate);