1 files changed, 122 insertions, 0 deletions
diff --git a/drivers/gpu/nvgpu/common/init/hal_init.c b/drivers/gpu/nvgpu/common/init/hal_init.c
new file mode 100644
index 00000000..598790b6
--- /dev/null
+++ b/drivers/gpu/nvgpu/common/init/hal_init.c
@@ -0,0 +1,122 @@
+/*
+ * NVIDIA GPU HAL interface.
+ *
+ * Copyright (c) 2014-2018, NVIDIA CORPORATION.  All rights reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+ */
+#include <nvgpu/gk20a.h>
+#include <nvgpu/log.h>
+#include <nvgpu/hal_init.h>
+#include <nvgpu/mc.h>
+#include <nvgpu/soc.h>
+#include "gm20b/hal_gm20b.h"
+#include "gp10b/hal_gp10b.h"
+#include "gp106/hal_gp106.h"
+#include "gv100/hal_gv100.h"
+#include "gv11b/hal_gv11b.h"
+#if defined(CONFIG_TEGRA_GPU_NEXT)
+#include "nvgpu_gpuid_next.h"
+#endif
+int nvgpu_init_hal(struct gk20a *g)
+{
+        int err = 0;
+        u32 ver = g->params.gpu_arch + g->params.gpu_impl;
+        switch (ver) {
+        case GK20A_GPUID_GM20B:
+                nvgpu_log_info(g, "gm20b detected");
+                if (gm20b_init_hal(g) != 0) {
+                        return -ENODEV;
+                }
+                break;
+        case GK20A_GPUID_GM20B_B:
+                nvgpu_log_info(g, "gm20b detected");
+                if (gm20b_init_hal(g) != 0) {
+                        return -ENODEV;
+                }
+                break;
+        case NVGPU_GPUID_GP10B:
+                if (gp10b_init_hal(g) != 0) {
+                        return -ENODEV;
+                }
+                break;
+        case NVGPU_GPUID_GP104:
+                if (gp106_init_hal(g) != 0) {
+                        return -ENODEV;
+                }
+                break;
+        case NVGPU_GPUID_GP106:
+                if (gp106_init_hal(g) != 0) {
+                        return -ENODEV;
+                }
+                break;
+        case NVGPU_GPUID_GV11B:
+                if (gv11b_init_hal(g) != 0) {
+                        return -ENODEV;
+                }
+                break;
+        case NVGPU_GPUID_GV100:
+                if (gv100_init_hal(g) != 0) {
+                        return -ENODEV;
+                }
+                break;
+#if defined(CONFIG_TEGRA_GPU_NEXT)
+        case NVGPU_GPUID_NEXT:
+                if (NVGPU_NEXT_INIT_HAL(g) != 0) {
+                        return -ENODEV;
+                }
+                break;
+#endif
+        default:
+                nvgpu_err(g, "no support for %x", ver);
+                err = -ENODEV;
+                break;
+        }
+        return err;
+}
+int nvgpu_detect_chip(struct gk20a *g)
+{
+        struct nvgpu_gpu_params *p = &g->params;
+        if (p->gpu_arch != 0U) {
+                return 0;
+        }
+        nvgpu_mc_boot_0(g, &p->gpu_arch, &p->gpu_impl, &p->gpu_rev);
+        if ((p->gpu_arch + p->gpu_impl) == (u32)NVGPU_GPUID_GV11B) {
+                /* overwrite gpu revison for A02  */
+                if (!nvgpu_is_soc_t194_a01(g)) {
+                        p->gpu_rev = 0xa2;
+                }
+        }
+        nvgpu_log_info(g, "arch: %x, impl: %x, rev: %x\n",
+                        g->params.gpu_arch,
+                        g->params.gpu_impl,
+                        g->params.gpu_rev);
+        return nvgpu_init_hal(g);
+}

diff --git a/drivers/gpu/nvgpu/common/init/hal_init.c b/drivers/gpu/nvgpu/common/init/hal_init.c new file mode 100644 index 00000000..598790b6 --- /dev/null +++ b/drivers/gpu/nvgpu/common/init/hal_init.c
@@ -0,0 +1,122 @@
	1	/*
	2	* NVIDIA GPU HAL interface.
	3	*
	4	* Copyright (c) 2014-2018, NVIDIA CORPORATION. All rights reserved.
	5	*
	6	* Permission is hereby granted, free of charge, to any person obtaining a
	7	* copy of this software and associated documentation files (the "Software"),
	8	* to deal in the Software without restriction, including without limitation
	9	* the rights to use, copy, modify, merge, publish, distribute, sublicense,
	10	* and/or sell copies of the Software, and to permit persons to whom the
	11	* Software is furnished to do so, subject to the following conditions:
	12	*
	13	* The above copyright notice and this permission notice shall be included in
	14	* all copies or substantial portions of the Software.
	15	*
	16	* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
	17	* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
	18	* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
	19	* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
	20	* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
	21	* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
	22	* DEALINGS IN THE SOFTWARE.
	23	*/
	24
	25	#include <nvgpu/gk20a.h>
	26	#include <nvgpu/log.h>
	27	#include <nvgpu/hal_init.h>
	28	#include <nvgpu/mc.h>
	29	#include <nvgpu/soc.h>
	30
	31	#include "gm20b/hal_gm20b.h"
	32	#include "gp10b/hal_gp10b.h"
	33	#include "gp106/hal_gp106.h"
	34	#include "gv100/hal_gv100.h"
	35	#include "gv11b/hal_gv11b.h"
	36	#if defined(CONFIG_TEGRA_GPU_NEXT)
	37	#include "nvgpu_gpuid_next.h"
	38	#endif
	39
	40	int nvgpu_init_hal(struct gk20a *g)
	41	{
	42	int err = 0;
	43	u32 ver = g->params.gpu_arch + g->params.gpu_impl;
	44
	45	switch (ver) {
	46	case GK20A_GPUID_GM20B:
	47	nvgpu_log_info(g, "gm20b detected");
	48	if (gm20b_init_hal(g) != 0) {
	49	return -ENODEV;
	50	}
	51	break;
	52	case GK20A_GPUID_GM20B_B:
	53	nvgpu_log_info(g, "gm20b detected");
	54	if (gm20b_init_hal(g) != 0) {
	55	return -ENODEV;
	56	}
	57	break;
	58	case NVGPU_GPUID_GP10B:
	59	if (gp10b_init_hal(g) != 0) {
	60	return -ENODEV;
	61	}
	62	break;
	63	case NVGPU_GPUID_GP104:
	64	if (gp106_init_hal(g) != 0) {
	65	return -ENODEV;
	66	}
	67	break;
	68	case NVGPU_GPUID_GP106:
	69	if (gp106_init_hal(g) != 0) {
	70	return -ENODEV;
	71	}
	72	break;
	73	case NVGPU_GPUID_GV11B:
	74	if (gv11b_init_hal(g) != 0) {
	75	return -ENODEV;
	76	}
	77	break;
	78	case NVGPU_GPUID_GV100:
	79	if (gv100_init_hal(g) != 0) {
	80	return -ENODEV;
	81	}
	82	break;
	83	#if defined(CONFIG_TEGRA_GPU_NEXT)
	84	case NVGPU_GPUID_NEXT:
	85	if (NVGPU_NEXT_INIT_HAL(g) != 0) {
	86	return -ENODEV;
	87	}
	88	break;
	89	#endif
	90	default:
	91	nvgpu_err(g, "no support for %x", ver);
	92	err = -ENODEV;
	93	break;
	94	}
	95
	96	return err;
	97	}
	98
	99
	100	int nvgpu_detect_chip(struct gk20a *g)
	101	{
	102	struct nvgpu_gpu_params *p = &g->params;
	103
	104	if (p->gpu_arch != 0U) {
	105	return 0;
	106	}
	107
	108	nvgpu_mc_boot_0(g, &p->gpu_arch, &p->gpu_impl, &p->gpu_rev);
	109
	110	if ((p->gpu_arch + p->gpu_impl) == (u32)NVGPU_GPUID_GV11B) {
	111	/* overwrite gpu revison for A02 */
	112	if (!nvgpu_is_soc_t194_a01(g)) {
	113	p->gpu_rev = 0xa2;
	114	}
	115	}
	116	nvgpu_log_info(g, "arch: %x, impl: %x, rev: %x\n",
	117	g->params.gpu_arch,
	118	g->params.gpu_impl,
	119	g->params.gpu_rev);
	120
	121	return nvgpu_init_hal(g);
	122	}