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Diffstat (limited to 'drivers/gpu/nvgpu/common/fb')
-rw-r--r--drivers/gpu/nvgpu/common/fb/fb_gm20b.c10
1 files changed, 2 insertions, 8 deletions
diff --git a/drivers/gpu/nvgpu/common/fb/fb_gm20b.c b/drivers/gpu/nvgpu/common/fb/fb_gm20b.c
index 5e78f636..56c7429a 100644
--- a/drivers/gpu/nvgpu/common/fb/fb_gm20b.c
+++ b/drivers/gpu/nvgpu/common/fb/fb_gm20b.c
@@ -35,7 +35,6 @@
35 35
36#include <nvgpu/hw/gm20b/hw_fb_gm20b.h> 36#include <nvgpu/hw/gm20b/hw_fb_gm20b.h>
37#include <nvgpu/hw/gm20b/hw_gmmu_gm20b.h> 37#include <nvgpu/hw/gm20b/hw_gmmu_gm20b.h>
38#include <nvgpu/hw/gm20b/hw_gr_gm20b.h>
39 38
40#define VPR_INFO_FETCH_WAIT (5) 39#define VPR_INFO_FETCH_WAIT (5)
41#define WPR_INFO_ADDR_ALIGNMENT 0x0000000c 40#define WPR_INFO_ADDR_ALIGNMENT 0x0000000c
@@ -209,15 +208,13 @@ bool gm20b_fb_debug_mode_enabled(struct gk20a *g)
209 208
210void gm20b_fb_set_debug_mode(struct gk20a *g, bool enable) 209void gm20b_fb_set_debug_mode(struct gk20a *g, bool enable)
211{ 210{
212 u32 reg_val, fb_debug_ctrl, gpc_debug_ctrl; 211 u32 reg_val, fb_debug_ctrl;
213 212
214 if (enable) { 213 if (enable) {
215 fb_debug_ctrl = fb_mmu_debug_ctrl_debug_enabled_f(); 214 fb_debug_ctrl = fb_mmu_debug_ctrl_debug_enabled_f();
216 gpc_debug_ctrl = gr_gpcs_pri_mmu_debug_ctrl_debug_enabled_f();
217 g->mmu_debug_ctrl = true; 215 g->mmu_debug_ctrl = true;
218 } else { 216 } else {
219 fb_debug_ctrl = fb_mmu_debug_ctrl_debug_disabled_f(); 217 fb_debug_ctrl = fb_mmu_debug_ctrl_debug_disabled_f();
220 gpc_debug_ctrl = gr_gpcs_pri_mmu_debug_ctrl_debug_disabled_f();
221 g->mmu_debug_ctrl = false; 218 g->mmu_debug_ctrl = false;
222 } 219 }
223 220
@@ -226,8 +223,5 @@ void gm20b_fb_set_debug_mode(struct gk20a *g, bool enable)
226 fb_mmu_debug_ctrl_debug_m(), fb_debug_ctrl); 223 fb_mmu_debug_ctrl_debug_m(), fb_debug_ctrl);
227 gk20a_writel(g, fb_mmu_debug_ctrl_r(), reg_val); 224 gk20a_writel(g, fb_mmu_debug_ctrl_r(), reg_val);
228 225
229 reg_val = gk20a_readl(g, gr_gpcs_pri_mmu_debug_ctrl_r()); 226 g->ops.gr.set_debug_mode(g, enable);
230 reg_val = set_field(reg_val,
231 gr_gpcs_pri_mmu_debug_ctrl_debug_m(), gpc_debug_ctrl);
232 gk20a_writel(g, gr_gpcs_pri_mmu_debug_ctrl_r(), reg_val);
233} 227}