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Diffstat (limited to 'drivers/gpu/nvgpu/common/fb/fb_gk20a.c')
-rw-r--r--drivers/gpu/nvgpu/common/fb/fb_gk20a.c124
1 files changed, 0 insertions, 124 deletions
diff --git a/drivers/gpu/nvgpu/common/fb/fb_gk20a.c b/drivers/gpu/nvgpu/common/fb/fb_gk20a.c
deleted file mode 100644
index 78523965..00000000
--- a/drivers/gpu/nvgpu/common/fb/fb_gk20a.c
+++ /dev/null
@@ -1,124 +0,0 @@
1/*
2 * GK20A memory interface
3 *
4 * Copyright (c) 2014-2018, NVIDIA CORPORATION. All rights reserved.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
22 * DEALINGS IN THE SOFTWARE.
23 */
24
25#include <trace/events/gk20a.h>
26
27#include "gk20a/gk20a.h"
28
29#include "fb_gk20a.h"
30
31#include <nvgpu/timers.h>
32#include <nvgpu/io.h>
33#include <nvgpu/utils.h>
34
35#include <nvgpu/hw/gk20a/hw_mc_gk20a.h>
36#include <nvgpu/hw/gk20a/hw_fb_gk20a.h>
37
38void fb_gk20a_reset(struct gk20a *g)
39{
40 u32 val;
41
42 nvgpu_log_info(g, "reset gk20a fb");
43
44 val = gk20a_readl(g, mc_elpg_enable_r());
45 val |= mc_elpg_enable_xbar_enabled_f()
46 | mc_elpg_enable_pfb_enabled_f()
47 | mc_elpg_enable_hub_enabled_f();
48 gk20a_writel(g, mc_elpg_enable_r(), val);
49}
50
51void gk20a_fb_init_hw(struct gk20a *g)
52{
53 u32 addr = nvgpu_mem_get_addr(g, &g->mm.sysmem_flush) >> 8;
54
55 gk20a_writel(g, fb_niso_flush_sysmem_addr_r(), addr);
56}
57
58void gk20a_fb_tlb_invalidate(struct gk20a *g, struct nvgpu_mem *pdb)
59{
60 struct nvgpu_timeout timeout;
61 u32 addr_lo;
62 u32 data;
63
64 nvgpu_log_fn(g, " ");
65
66 /* pagetables are considered sw states which are preserved after
67 prepare_poweroff. When gk20a deinit releases those pagetables,
68 common code in vm unmap path calls tlb invalidate that touches
69 hw. Use the power_on flag to skip tlb invalidation when gpu
70 power is turned off */
71
72 if (!g->power_on) {
73 return;
74 }
75
76 addr_lo = u64_lo32(nvgpu_mem_get_addr(g, pdb) >> 12);
77
78 nvgpu_mutex_acquire(&g->mm.tlb_lock);
79
80 trace_gk20a_mm_tlb_invalidate(g->name);
81
82 nvgpu_timeout_init(g, &timeout, 1000, NVGPU_TIMER_RETRY_TIMER);
83
84 do {
85 data = gk20a_readl(g, fb_mmu_ctrl_r());
86 if (fb_mmu_ctrl_pri_fifo_space_v(data) != 0) {
87 break;
88 }
89 nvgpu_udelay(2);
90 } while (!nvgpu_timeout_expired_msg(&timeout,
91 "wait mmu fifo space"));
92
93 if (nvgpu_timeout_peek_expired(&timeout)) {
94 goto out;
95 }
96
97 nvgpu_timeout_init(g, &timeout, 1000, NVGPU_TIMER_RETRY_TIMER);
98
99 gk20a_writel(g, fb_mmu_invalidate_pdb_r(),
100 fb_mmu_invalidate_pdb_addr_f(addr_lo) |
101 nvgpu_aperture_mask(g, pdb,
102 fb_mmu_invalidate_pdb_aperture_sys_mem_f(),
103 fb_mmu_invalidate_pdb_aperture_sys_mem_f(),
104 fb_mmu_invalidate_pdb_aperture_vid_mem_f()));
105
106 gk20a_writel(g, fb_mmu_invalidate_r(),
107 fb_mmu_invalidate_all_va_true_f() |
108 fb_mmu_invalidate_trigger_true_f());
109
110 do {
111 data = gk20a_readl(g, fb_mmu_ctrl_r());
112 if (fb_mmu_ctrl_pri_fifo_empty_v(data) !=
113 fb_mmu_ctrl_pri_fifo_empty_false_f()) {
114 break;
115 }
116 nvgpu_udelay(2);
117 } while (!nvgpu_timeout_expired_msg(&timeout,
118 "wait mmu invalidate"));
119
120 trace_gk20a_mm_tlb_invalidate_done(g->name);
121
122out:
123 nvgpu_mutex_release(&g->mm.tlb_lock);
124}