summaryrefslogtreecommitdiffstats
path: root/drivers/gpu/nvgpu/clk/clk_fll.c
diff options
context:
space:
mode:
Diffstat (limited to 'drivers/gpu/nvgpu/clk/clk_fll.c')
-rw-r--r--drivers/gpu/nvgpu/clk/clk_fll.c28
1 files changed, 14 insertions, 14 deletions
diff --git a/drivers/gpu/nvgpu/clk/clk_fll.c b/drivers/gpu/nvgpu/clk/clk_fll.c
index 15d386d5..87222b90 100644
--- a/drivers/gpu/nvgpu/clk/clk_fll.c
+++ b/drivers/gpu/nvgpu/clk/clk_fll.c
@@ -50,7 +50,7 @@ static u32 _clk_fll_devgrp_pmudatainit_super(struct gk20a *g,
50 pboardobjgrp; 50 pboardobjgrp;
51 u32 status = 0; 51 u32 status = 0;
52 52
53 gk20a_dbg_info(""); 53 nvgpu_log_info(g, " ");
54 54
55 status = boardobjgrp_pmudatainit_e32(g, pboardobjgrp, pboardobjgrppmu); 55 status = boardobjgrp_pmudatainit_e32(g, pboardobjgrp, pboardobjgrppmu);
56 if (status) { 56 if (status) {
@@ -67,7 +67,7 @@ static u32 _clk_fll_devgrp_pmudatainit_super(struct gk20a *g,
67 pfll_objs->lut_prog_master_mask.super.bitcount, 67 pfll_objs->lut_prog_master_mask.super.bitcount,
68 &pset->lut_prog_master_mask.super); 68 &pset->lut_prog_master_mask.super);
69 69
70 gk20a_dbg_info(" Done"); 70 nvgpu_log_info(g, " Done");
71 return status; 71 return status;
72} 72}
73 73
@@ -80,7 +80,7 @@ static u32 _clk_fll_devgrp_pmudata_instget(struct gk20a *g,
80 (struct nv_pmu_clk_clk_fll_device_boardobj_grp_set *) 80 (struct nv_pmu_clk_clk_fll_device_boardobj_grp_set *)
81 pmuboardobjgrp; 81 pmuboardobjgrp;
82 82
83 gk20a_dbg_info(""); 83 nvgpu_log_info(g, " ");
84 84
85 /*check whether pmuboardobjgrp has a valid boardobj in index*/ 85 /*check whether pmuboardobjgrp has a valid boardobj in index*/
86 if (((u32)BIT(idx) & 86 if (((u32)BIT(idx) &
@@ -89,7 +89,7 @@ static u32 _clk_fll_devgrp_pmudata_instget(struct gk20a *g,
89 89
90 *ppboardobjpmudata = (struct nv_pmu_boardobj *) 90 *ppboardobjpmudata = (struct nv_pmu_boardobj *)
91 &pgrp_set->objects[idx].data.board_obj; 91 &pgrp_set->objects[idx].data.board_obj;
92 gk20a_dbg_info(" Done"); 92 nvgpu_log_info(g, " Done");
93 return 0; 93 return 0;
94} 94}
95 95
@@ -123,7 +123,7 @@ u32 clk_fll_sw_setup(struct gk20a *g)
123 u8 i; 123 u8 i;
124 u8 j; 124 u8 j;
125 125
126 gk20a_dbg_info(""); 126 nvgpu_log_info(g, " ");
127 127
128 status = boardobjgrpconstruct_e32(g, &g->clk_pmu.avfs_fllobjs.super); 128 status = boardobjgrpconstruct_e32(g, &g->clk_pmu.avfs_fllobjs.super);
129 if (status) { 129 if (status) {
@@ -202,7 +202,7 @@ u32 clk_fll_sw_setup(struct gk20a *g)
202 } 202 }
203 } 203 }
204done: 204done:
205 gk20a_dbg_info(" done status %x", status); 205 nvgpu_log_info(g, " done status %x", status);
206 return status; 206 return status;
207} 207}
208 208
@@ -211,7 +211,7 @@ u32 clk_fll_pmu_setup(struct gk20a *g)
211 u32 status; 211 u32 status;
212 struct boardobjgrp *pboardobjgrp = NULL; 212 struct boardobjgrp *pboardobjgrp = NULL;
213 213
214 gk20a_dbg_info(""); 214 nvgpu_log_info(g, " ");
215 215
216 pboardobjgrp = &g->clk_pmu.avfs_fllobjs.super.super; 216 pboardobjgrp = &g->clk_pmu.avfs_fllobjs.super.super;
217 217
@@ -220,7 +220,7 @@ u32 clk_fll_pmu_setup(struct gk20a *g)
220 220
221 status = pboardobjgrp->pmuinithandle(g, pboardobjgrp); 221 status = pboardobjgrp->pmuinithandle(g, pboardobjgrp);
222 222
223 gk20a_dbg_info("Done"); 223 nvgpu_log_info(g, "Done");
224 return status; 224 return status;
225} 225}
226 226
@@ -241,7 +241,7 @@ static u32 devinit_get_fll_device_table(struct gk20a *g,
241 u32 vbios_domain = NV_PERF_DOMAIN_4X_CLOCK_DOMAIN_SKIP; 241 u32 vbios_domain = NV_PERF_DOMAIN_4X_CLOCK_DOMAIN_SKIP;
242 struct avfsvinobjs *pvinobjs = &g->clk_pmu.avfs_vinobjs; 242 struct avfsvinobjs *pvinobjs = &g->clk_pmu.avfs_vinobjs;
243 243
244 gk20a_dbg_info(""); 244 nvgpu_log_info(g, " ");
245 245
246 fll_table_ptr = (u8 *)nvgpu_bios_get_perf_table_ptrs(g, 246 fll_table_ptr = (u8 *)nvgpu_bios_get_perf_table_ptrs(g,
247 g->bios.clock_token, FLL_TABLE); 247 g->bios.clock_token, FLL_TABLE);
@@ -350,7 +350,7 @@ static u32 devinit_get_fll_device_table(struct gk20a *g,
350 } 350 }
351 351
352done: 352done:
353 gk20a_dbg_info(" done status %x", status); 353 nvgpu_log_info(g, " done status %x", status);
354 return status; 354 return status;
355} 355}
356 356
@@ -399,7 +399,7 @@ static struct fll_device *construct_fll_device(struct gk20a *g,
399 struct fll_device *board_obj_fll_ptr = NULL; 399 struct fll_device *board_obj_fll_ptr = NULL;
400 u32 status; 400 u32 status;
401 401
402 gk20a_dbg_info(""); 402 nvgpu_log_info(g, " ");
403 status = boardobj_construct_super(g, &board_obj_ptr, 403 status = boardobj_construct_super(g, &board_obj_ptr,
404 sizeof(struct fll_device), pargs); 404 sizeof(struct fll_device), pargs);
405 if (status) 405 if (status)
@@ -429,7 +429,7 @@ static struct fll_device *construct_fll_device(struct gk20a *g,
429 boardobjgrpmask_e32_init( 429 boardobjgrpmask_e32_init(
430 &board_obj_fll_ptr->lut_prog_broadcast_slave_mask, NULL); 430 &board_obj_fll_ptr->lut_prog_broadcast_slave_mask, NULL);
431 431
432 gk20a_dbg_info(" Done"); 432 nvgpu_log_info(g, " Done");
433 433
434 return (struct fll_device *)board_obj_ptr; 434 return (struct fll_device *)board_obj_ptr;
435} 435}
@@ -442,7 +442,7 @@ static u32 fll_device_init_pmudata_super(struct gk20a *g,
442 struct fll_device *pfll_dev; 442 struct fll_device *pfll_dev;
443 struct nv_pmu_clk_clk_fll_device_boardobj_set *perf_pmu_data; 443 struct nv_pmu_clk_clk_fll_device_boardobj_set *perf_pmu_data;
444 444
445 gk20a_dbg_info(""); 445 nvgpu_log_info(g, " ");
446 446
447 status = boardobj_pmudatainit_super(g, board_obj_ptr, ppmudata); 447 status = boardobj_pmudatainit_super(g, board_obj_ptr, ppmudata);
448 if (status != 0) 448 if (status != 0)
@@ -473,7 +473,7 @@ static u32 fll_device_init_pmudata_super(struct gk20a *g,
473 pfll_dev->lut_prog_broadcast_slave_mask.super.bitcount, 473 pfll_dev->lut_prog_broadcast_slave_mask.super.bitcount,
474 &perf_pmu_data->lut_prog_broadcast_slave_mask.super); 474 &perf_pmu_data->lut_prog_broadcast_slave_mask.super);
475 475
476 gk20a_dbg_info(" Done"); 476 nvgpu_log_info(g, " Done");
477 477
478 return status; 478 return status;
479} 479}