3 files changed, 44 insertions, 0 deletions

diff --git a/drivers/gpu/nvgpu/gk20a/gk20a.h b/drivers/gpu/nvgpu/gk20a/gk20a.h
index 9e0dd64a..b955a84a 100644
--- a/drivers/gpu/nvgpu/gk20a/gk20a.h
+++ b/drivers/gpu/nvgpu/gk20a/gk20a.h
@@ -593,6 +593,7 @@ struct gpu_ops {
                 int (*get_internal_sensor_curr_temp)(struct gk20a *g, u32 *temp_f24_8);
                 void (*get_internal_sensor_limits)(s32 *max_24_8,
                                                         s32 *min_24_8);
+                u32 (*configure_therm_alert)(struct gk20a *g, s32 curr_warn_temp);
         } therm;
         struct {
                 bool (*is_pmu_supported)(struct gk20a *g);
diff --git a/drivers/gpu/nvgpu/gk20a/pmu_gk20a.c b/drivers/gpu/nvgpu/gk20a/pmu_gk20a.c
index 56ebda1a..58dd6f43 100644
--- a/drivers/gpu/nvgpu/gk20a/pmu_gk20a.c
+++ b/drivers/gpu/nvgpu/gk20a/pmu_gk20a.c
@@ -4029,6 +4029,24 @@ static int pmu_handle_perfmon_event(struct pmu_gk20a *pmu,
 }
 
 
+static int pmu_handle_therm_event(struct pmu_gk20a *pmu,
+                        struct nv_pmu_therm_msg *msg)
+{
+        gk20a_dbg_fn("");
+
+        switch (msg->msg_type) {
+        case NV_PMU_THERM_MSG_ID_EVENT_HW_SLOWDOWN_NOTIFICATION:
+                gk20a_dbg_pmu("received asserted event mask %d",
+                        msg->hw_slct_msg.mask);
+                break;
+        default:
+                gk20a_dbg_pmu("unkown therm event received %d", msg->msg_type);
+                break;
+        }
+
+        return 0;
+}
+
 static int pmu_handle_event(struct pmu_gk20a *pmu, struct pmu_msg *msg)
 {
         int err = 0;
@@ -4048,6 +4066,9 @@ static int pmu_handle_event(struct pmu_gk20a *pmu, struct pmu_msg *msg)
                         WARN_ON(1);
                 }
                 break;
+        case PMU_UNIT_THERM:
+                err = pmu_handle_therm_event(pmu, &msg->msg.therm);
+                break;
         default:
                 break;
         }
diff --git a/drivers/gpu/nvgpu/pmuif/gpmuiftherm.h b/drivers/gpu/nvgpu/pmuif/gpmuiftherm.h
index 9c10e93c..c87fe8a8 100644
--- a/drivers/gpu/nvgpu/pmuif/gpmuiftherm.h
+++ b/drivers/gpu/nvgpu/pmuif/gpmuiftherm.h
@@ -18,8 +18,12 @@
 
 #define NV_PMU_THERM_CMD_ID_RPC                                      0x00000002
 #define NV_PMU_THERM_MSG_ID_RPC                                      0x00000002
+#define NV_PMU_THERM_RPC_ID_SLCT                                     0x00000000
 #define NV_PMU_THERM_RPC_ID_SLCT_EVENT_TEMP_TH_SET                   0x00000006
 #define NV_PMU_THERM_EVENT_THERMAL_1                                 0x00000004
+#define NV_PMU_THERM_CMD_ID_HW_SLOWDOWN_NOTIFICATION                 0x00000001
+#define NV_RM_PMU_THERM_HW_SLOWDOWN_NOTIFICATION_REQUEST_ENABLE      0x00000001
+#define NV_PMU_THERM_MSG_ID_EVENT_HW_SLOWDOWN_NOTIFICATION           0x00000001
 
 struct nv_pmu_therm_rpc_slct_event_temp_th_set {
         s32 temp_threshold;
@@ -27,10 +31,16 @@ struct nv_pmu_therm_rpc_slct_event_temp_th_set {
         flcn_status flcn_stat;
 };
 
+struct nv_pmu_therm_rpc_slct {
+        u32 mask_enabled;
+        flcn_status flcn_stat;
+};
+
 struct nv_pmu_therm_rpc {
         u8 function;
         bool b_supported;
         union {
+                struct nv_pmu_therm_rpc_slct slct;
                 struct nv_pmu_therm_rpc_slct_event_temp_th_set slct_event_temp_th_set;
         } params;
 };
@@ -41,6 +51,11 @@ struct nv_pmu_therm_cmd_rpc {
         struct nv_pmu_allocation request;
 };
 
+struct nv_pmu_therm_cmd_hw_slowdown_notification {
+        u8 cmd_type;
+        u8 request;
+};
+
 #define NV_PMU_THERM_CMD_RPC_ALLOC_OFFSET       \
         offsetof(struct nv_pmu_therm_cmd_rpc, request)
 
@@ -48,6 +63,7 @@ struct nv_pmu_therm_cmd {
         union {
                 u8 cmd_type;
                 struct nv_pmu_therm_cmd_rpc rpc;
+                struct nv_pmu_therm_cmd_hw_slowdown_notification hw_slct_notification;
         };
 };
 
@@ -57,6 +73,11 @@ struct nv_pmu_therm_msg_rpc {
         struct nv_pmu_allocation response;
 };
 
+struct nv_pmu_therm_msg_event_hw_slowdown_notification {
+        u8 msg_type;
+        u32 mask;
+};
+
 #define NV_PMU_THERM_MSG_RPC_ALLOC_OFFSET       \
         offsetof(struct nv_pmu_therm_msg_rpc, response)
 
@@ -64,6 +85,7 @@ struct nv_pmu_therm_msg {
         union {
                 u8 msg_type;
                 struct nv_pmu_therm_msg_rpc rpc;
+                struct nv_pmu_therm_msg_event_hw_slowdown_notification hw_slct_msg;
         };
 };