diff options
16 files changed, 66 insertions, 47 deletions
diff --git a/drivers/gpu/nvgpu/Makefile b/drivers/gpu/nvgpu/Makefile index 6a075ce4..8c289947 100644 --- a/drivers/gpu/nvgpu/Makefile +++ b/drivers/gpu/nvgpu/Makefile | |||
@@ -27,6 +27,8 @@ nvgpu-y += common/bus/bus_gk20a.o \ | |||
27 | common/bus/bus_gm20b.o \ | 27 | common/bus/bus_gm20b.o \ |
28 | common/bus/bus_gp10b.o \ | 28 | common/bus/bus_gp10b.o \ |
29 | common/bus/bus_gv100.o \ | 29 | common/bus/bus_gv100.o \ |
30 | common/priv_ring/priv_ring_gm20b.o \ | ||
31 | common/priv_ring/priv_ring_gp10b.o \ | ||
30 | common/ptimer/ptimer.o \ | 32 | common/ptimer/ptimer.o \ |
31 | common/ptimer/ptimer_gk20a.o \ | 33 | common/ptimer/ptimer_gk20a.o \ |
32 | common/fb/fb_gk20a.o \ | 34 | common/fb/fb_gk20a.o \ |
@@ -201,7 +203,6 @@ nvgpu-y += \ | |||
201 | gk20a/mm_gk20a.o \ | 203 | gk20a/mm_gk20a.o \ |
202 | gk20a/pmu_gk20a.o \ | 204 | gk20a/pmu_gk20a.o \ |
203 | gk20a/flcn_gk20a.o \ | 205 | gk20a/flcn_gk20a.o \ |
204 | gk20a/priv_ring_gk20a.o \ | ||
205 | gk20a/fence_gk20a.o \ | 206 | gk20a/fence_gk20a.o \ |
206 | gk20a/therm_gk20a.o \ | 207 | gk20a/therm_gk20a.o \ |
207 | gk20a/gr_ctx_gk20a_sim.o \ | 208 | gk20a/gr_ctx_gk20a_sim.o \ |
@@ -269,7 +270,6 @@ nvgpu-y += \ | |||
269 | gp10b/regops_gp10b.o \ | 270 | gp10b/regops_gp10b.o \ |
270 | gp10b/therm_gp10b.o \ | 271 | gp10b/therm_gp10b.o \ |
271 | gp10b/fecs_trace_gp10b.o \ | 272 | gp10b/fecs_trace_gp10b.o \ |
272 | gp10b/priv_ring_gp10b.o \ | ||
273 | gp10b/gp10b.o \ | 273 | gp10b/gp10b.o \ |
274 | gp10b/fuse_gp10b.o \ | 274 | gp10b/fuse_gp10b.o \ |
275 | gp10b/ecc_gp10b.o \ | 275 | gp10b/ecc_gp10b.o \ |
diff --git a/drivers/gpu/nvgpu/Makefile.sources b/drivers/gpu/nvgpu/Makefile.sources index 677b20bd..e8e107ae 100644 --- a/drivers/gpu/nvgpu/Makefile.sources +++ b/drivers/gpu/nvgpu/Makefile.sources | |||
@@ -36,6 +36,8 @@ srcs := common/mm/nvgpu_allocator.c \ | |||
36 | common/bus/bus_gm20b.c \ | 36 | common/bus/bus_gm20b.c \ |
37 | common/bus/bus_gp10b.c \ | 37 | common/bus/bus_gp10b.c \ |
38 | common/bus/bus_gv100.c \ | 38 | common/bus/bus_gv100.c \ |
39 | common/priv_ring/priv_ring_gm20b.c \ | ||
40 | common/priv_ring/priv_ring_gp10b.c \ | ||
39 | common/fb/fb_gk20a.c \ | 41 | common/fb/fb_gk20a.c \ |
40 | common/fb/fb_gm20b.c \ | 42 | common/fb/fb_gm20b.c \ |
41 | common/fb/fb_gp10b.c \ | 43 | common/fb/fb_gp10b.c \ |
@@ -135,7 +137,6 @@ srcs := common/mm/nvgpu_allocator.c \ | |||
135 | gk20a/mm_gk20a.c \ | 137 | gk20a/mm_gk20a.c \ |
136 | gk20a/pmu_gk20a.c \ | 138 | gk20a/pmu_gk20a.c \ |
137 | gk20a/flcn_gk20a.c \ | 139 | gk20a/flcn_gk20a.c \ |
138 | gk20a/priv_ring_gk20a.c \ | ||
139 | gk20a/fence_gk20a.c \ | 140 | gk20a/fence_gk20a.c \ |
140 | gk20a/therm_gk20a.c \ | 141 | gk20a/therm_gk20a.c \ |
141 | gk20a/gr_ctx_gk20a_sim.c \ | 142 | gk20a/gr_ctx_gk20a_sim.c \ |
@@ -167,7 +168,6 @@ srcs := common/mm/nvgpu_allocator.c \ | |||
167 | gp10b/regops_gp10b.c \ | 168 | gp10b/regops_gp10b.c \ |
168 | gp10b/therm_gp10b.c \ | 169 | gp10b/therm_gp10b.c \ |
169 | gp10b/fecs_trace_gp10b.c \ | 170 | gp10b/fecs_trace_gp10b.c \ |
170 | gp10b/priv_ring_gp10b.c \ | ||
171 | gp10b/gp10b.c \ | 171 | gp10b/gp10b.c \ |
172 | gp10b/fuse_gp10b.c \ | 172 | gp10b/fuse_gp10b.c \ |
173 | gp10b/ecc_gp10b.c \ | 173 | gp10b/ecc_gp10b.c \ |
diff --git a/drivers/gpu/nvgpu/gk20a/priv_ring_gk20a.c b/drivers/gpu/nvgpu/common/priv_ring/priv_ring_gm20b.c index 0e004a5d..1445473a 100644 --- a/drivers/gpu/nvgpu/gk20a/priv_ring_gk20a.c +++ b/drivers/gpu/nvgpu/common/priv_ring/priv_ring_gm20b.c | |||
@@ -1,6 +1,4 @@ | |||
1 | /* | 1 | /* |
2 | * GK20A priv ring | ||
3 | * | ||
4 | * Copyright (c) 2011-2018, NVIDIA CORPORATION. All rights reserved. | 2 | * Copyright (c) 2011-2018, NVIDIA CORPORATION. All rights reserved. |
5 | * | 3 | * |
6 | * Permission is hereby granted, free of charge, to any person obtaining a | 4 | * Permission is hereby granted, free of charge, to any person obtaining a |
@@ -22,7 +20,7 @@ | |||
22 | * DEALINGS IN THE SOFTWARE. | 20 | * DEALINGS IN THE SOFTWARE. |
23 | */ | 21 | */ |
24 | 22 | ||
25 | #include "gk20a.h" | 23 | #include "gk20a/gk20a.h" |
26 | 24 | ||
27 | #include <nvgpu/log.h> | 25 | #include <nvgpu/log.h> |
28 | #include <nvgpu/timers.h> | 26 | #include <nvgpu/timers.h> |
@@ -30,13 +28,13 @@ | |||
30 | #include <nvgpu/io.h> | 28 | #include <nvgpu/io.h> |
31 | #include <nvgpu/utils.h> | 29 | #include <nvgpu/utils.h> |
32 | 30 | ||
33 | #include <nvgpu/hw/gk20a/hw_mc_gk20a.h> | 31 | #include "priv_ring_gm20b.h" |
34 | #include <nvgpu/hw/gk20a/hw_pri_ringmaster_gk20a.h> | 32 | |
35 | #include <nvgpu/hw/gk20a/hw_pri_ringstation_sys_gk20a.h> | 33 | #include <nvgpu/hw/gm20b/hw_pri_ringmaster_gm20b.h> |
36 | #include <nvgpu/hw/gk20a/hw_pri_ringstation_gpc_gk20a.h> | 34 | #include <nvgpu/hw/gm20b/hw_pri_ringstation_sys_gm20b.h> |
37 | #include <nvgpu/hw/gk20a/hw_pri_ringstation_fbp_gk20a.h> | 35 | #include <nvgpu/hw/gm20b/hw_pri_ringstation_gpc_gm20b.h> |
38 | 36 | ||
39 | void gk20a_enable_priv_ring(struct gk20a *g) | 37 | void gm20b_priv_ring_enable(struct gk20a *g) |
40 | { | 38 | { |
41 | if (nvgpu_is_enabled(g, NVGPU_IS_FMODEL)) | 39 | if (nvgpu_is_enabled(g, NVGPU_IS_FMODEL)) |
42 | return; | 40 | return; |
@@ -55,7 +53,7 @@ void gk20a_enable_priv_ring(struct gk20a *g) | |||
55 | gk20a_readl(g, pri_ringstation_sys_decode_config_r()); | 53 | gk20a_readl(g, pri_ringstation_sys_decode_config_r()); |
56 | } | 54 | } |
57 | 55 | ||
58 | void gk20a_priv_ring_isr(struct gk20a *g) | 56 | void gm20b_priv_ring_isr(struct gk20a *g) |
59 | { | 57 | { |
60 | u32 status0, status1; | 58 | u32 status0, status1; |
61 | u32 cmd; | 59 | u32 cmd; |
@@ -107,7 +105,7 @@ void gk20a_priv_ring_isr(struct gk20a *g) | |||
107 | nvgpu_warn(g, "priv ringmaster intr ack too many retries"); | 105 | nvgpu_warn(g, "priv ringmaster intr ack too many retries"); |
108 | } | 106 | } |
109 | 107 | ||
110 | void gk20a_priv_set_timeout_settings(struct gk20a *g) | 108 | void gm20b_priv_set_timeout_settings(struct gk20a *g) |
111 | { | 109 | { |
112 | /* | 110 | /* |
113 | * Bug 1340570: increase the clock timeout to avoid potential | 111 | * Bug 1340570: increase the clock timeout to avoid potential |
@@ -115,5 +113,9 @@ void gk20a_priv_set_timeout_settings(struct gk20a *g) | |||
115 | */ | 113 | */ |
116 | nvgpu_writel(g, pri_ringstation_sys_master_config_r(0x15), 0x800); | 114 | nvgpu_writel(g, pri_ringstation_sys_master_config_r(0x15), 0x800); |
117 | nvgpu_writel(g, pri_ringstation_gpc_master_config_r(0xa), 0x800); | 115 | nvgpu_writel(g, pri_ringstation_gpc_master_config_r(0xa), 0x800); |
118 | nvgpu_writel(g, pri_ringstation_fbp_master_config_r(0x8), 0x800); | 116 | } |
117 | |||
118 | u32 gm20b_priv_ring_enum_ltc(struct gk20a *g) | ||
119 | { | ||
120 | return gk20a_readl(g, pri_ringmaster_enum_ltc_r()); | ||
119 | } | 121 | } |
diff --git a/drivers/gpu/nvgpu/gk20a/priv_ring_gk20a.h b/drivers/gpu/nvgpu/common/priv_ring/priv_ring_gm20b.h index 98040624..02f20515 100644 --- a/drivers/gpu/nvgpu/gk20a/priv_ring_gk20a.h +++ b/drivers/gpu/nvgpu/common/priv_ring/priv_ring_gm20b.h | |||
@@ -1,7 +1,5 @@ | |||
1 | /* | 1 | /* |
2 | * GK20A PRIV ringmaster | 2 | * Copyright (c) 2011-2018, NVIDIA CORPORATION. All rights reserved. |
3 | * | ||
4 | * Copyright (c) 2011-2017, NVIDIA CORPORATION. All rights reserved. | ||
5 | * | 3 | * |
6 | * Permission is hereby granted, free of charge, to any person obtaining a | 4 | * Permission is hereby granted, free of charge, to any person obtaining a |
7 | * copy of this software and associated documentation files (the "Software"), | 5 | * copy of this software and associated documentation files (the "Software"), |
@@ -21,13 +19,14 @@ | |||
21 | * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER | 19 | * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER |
22 | * DEALINGS IN THE SOFTWARE. | 20 | * DEALINGS IN THE SOFTWARE. |
23 | */ | 21 | */ |
24 | #ifndef __PRIV_RING_GK20A_H__ | 22 | #ifndef __PRIV_RING_GM20B_H__ |
25 | #define __PRIV_RING_GK20A_H__ | 23 | #define __PRIV_RING_GM20B_H__ |
26 | 24 | ||
27 | struct gpu_ops; | 25 | struct gk20a; |
28 | 26 | ||
29 | void gk20a_priv_ring_isr(struct gk20a *g); | 27 | void gm20b_priv_ring_isr(struct gk20a *g); |
30 | void gk20a_enable_priv_ring(struct gk20a *g); | 28 | void gm20b_priv_ring_enable(struct gk20a *g); |
31 | void gk20a_priv_set_timeout_settings(struct gk20a *g); | 29 | void gm20b_priv_set_timeout_settings(struct gk20a *g); |
30 | u32 gm20b_priv_ring_enum_ltc(struct gk20a *g); | ||
32 | 31 | ||
33 | #endif /*__PRIV_RING_GK20A_H__*/ | 32 | #endif /*__PRIV_RING_GM20B_H__*/ |
diff --git a/drivers/gpu/nvgpu/gp10b/priv_ring_gp10b.c b/drivers/gpu/nvgpu/common/priv_ring/priv_ring_gp10b.c index 9fcf060b..04525375 100644 --- a/drivers/gpu/nvgpu/gp10b/priv_ring_gp10b.c +++ b/drivers/gpu/nvgpu/common/priv_ring/priv_ring_gp10b.c | |||
@@ -30,7 +30,6 @@ | |||
30 | #include <nvgpu/io.h> | 30 | #include <nvgpu/io.h> |
31 | #include <nvgpu/utils.h> | 31 | #include <nvgpu/utils.h> |
32 | 32 | ||
33 | #include <nvgpu/hw/gp10b/hw_mc_gp10b.h> | ||
34 | #include <nvgpu/hw/gp10b/hw_pri_ringmaster_gp10b.h> | 33 | #include <nvgpu/hw/gp10b/hw_pri_ringmaster_gp10b.h> |
35 | #include <nvgpu/hw/gp10b/hw_pri_ringstation_sys_gp10b.h> | 34 | #include <nvgpu/hw/gp10b/hw_pri_ringstation_sys_gp10b.h> |
36 | #include <nvgpu/hw/gp10b/hw_pri_ringstation_gpc_gp10b.h> | 35 | #include <nvgpu/hw/gp10b/hw_pri_ringstation_gpc_gp10b.h> |
diff --git a/drivers/gpu/nvgpu/gp10b/priv_ring_gp10b.h b/drivers/gpu/nvgpu/common/priv_ring/priv_ring_gp10b.h index dd418e5b..dd418e5b 100644 --- a/drivers/gpu/nvgpu/gp10b/priv_ring_gp10b.h +++ b/drivers/gpu/nvgpu/common/priv_ring/priv_ring_gp10b.h | |||
diff --git a/drivers/gpu/nvgpu/gk20a/gk20a.c b/drivers/gpu/nvgpu/gk20a/gk20a.c index 7fec4da7..24cfc6ec 100644 --- a/drivers/gpu/nvgpu/gk20a/gk20a.c +++ b/drivers/gpu/nvgpu/gk20a/gk20a.c | |||
@@ -187,7 +187,7 @@ int gk20a_finalize_poweron(struct gk20a *g) | |||
187 | if (g->ops.clk.disable_slowboot) | 187 | if (g->ops.clk.disable_slowboot) |
188 | g->ops.clk.disable_slowboot(g); | 188 | g->ops.clk.disable_slowboot(g); |
189 | 189 | ||
190 | gk20a_enable_priv_ring(g); | 190 | g->ops.priv_ring.enable_priv_ring(g); |
191 | 191 | ||
192 | /* TBD: move this after graphics init in which blcg/slcg is enabled. | 192 | /* TBD: move this after graphics init in which blcg/slcg is enabled. |
193 | This function removes SlowdownOnBoot which applies 32x divider | 193 | This function removes SlowdownOnBoot which applies 32x divider |
diff --git a/drivers/gpu/nvgpu/gk20a/gk20a.h b/drivers/gpu/nvgpu/gk20a/gk20a.h index bd477208..c29c03f0 100644 --- a/drivers/gpu/nvgpu/gk20a/gk20a.h +++ b/drivers/gpu/nvgpu/gk20a/gk20a.h | |||
@@ -69,7 +69,6 @@ struct nvgpu_ctxsw_trace_filter; | |||
69 | #include "fifo_gk20a.h" | 69 | #include "fifo_gk20a.h" |
70 | #include "tsg_gk20a.h" | 70 | #include "tsg_gk20a.h" |
71 | #include "pmu_gk20a.h" | 71 | #include "pmu_gk20a.h" |
72 | #include "priv_ring_gk20a.h" | ||
73 | #include "therm_gk20a.h" | 72 | #include "therm_gk20a.h" |
74 | #include "clk/clk.h" | 73 | #include "clk/clk.h" |
75 | #include "perf/perf.h" | 74 | #include "perf/perf.h" |
@@ -1235,9 +1234,11 @@ struct gpu_ops { | |||
1235 | void (*falcon_hal_sw_init)(struct nvgpu_falcon *flcn); | 1234 | void (*falcon_hal_sw_init)(struct nvgpu_falcon *flcn); |
1236 | } falcon; | 1235 | } falcon; |
1237 | struct { | 1236 | struct { |
1237 | void (*enable_priv_ring)(struct gk20a *g); | ||
1238 | void (*isr)(struct gk20a *g); | 1238 | void (*isr)(struct gk20a *g); |
1239 | void (*decode_error_code)(struct gk20a *g, u32 error_code); | 1239 | void (*decode_error_code)(struct gk20a *g, u32 error_code); |
1240 | void (*set_ppriv_timeout_settings)(struct gk20a *g); | 1240 | void (*set_ppriv_timeout_settings)(struct gk20a *g); |
1241 | u32 (*enum_ltc)(struct gk20a *g); | ||
1241 | } priv_ring; | 1242 | } priv_ring; |
1242 | struct { | 1243 | struct { |
1243 | int (*check_priv_security)(struct gk20a *g); | 1244 | int (*check_priv_security)(struct gk20a *g); |
diff --git a/drivers/gpu/nvgpu/gm20b/hal_gm20b.c b/drivers/gpu/nvgpu/gm20b/hal_gm20b.c index b37f6244..e6c4c8d1 100644 --- a/drivers/gpu/nvgpu/gm20b/hal_gm20b.c +++ b/drivers/gpu/nvgpu/gm20b/hal_gm20b.c | |||
@@ -25,6 +25,7 @@ | |||
25 | #include "common/clock_gating/gm20b_gating_reglist.h" | 25 | #include "common/clock_gating/gm20b_gating_reglist.h" |
26 | #include "common/bus/bus_gm20b.h" | 26 | #include "common/bus/bus_gm20b.h" |
27 | #include "common/bus/bus_gk20a.h" | 27 | #include "common/bus/bus_gk20a.h" |
28 | #include "common/priv_ring/priv_ring_gm20b.h" | ||
28 | #include "common/ptimer/ptimer_gk20a.h" | 29 | #include "common/ptimer/ptimer_gk20a.h" |
29 | #include "common/fb/fb_gk20a.h" | 30 | #include "common/fb/fb_gk20a.h" |
30 | #include "common/fb/fb_gm20b.h" | 31 | #include "common/fb/fb_gm20b.h" |
@@ -38,7 +39,6 @@ | |||
38 | #include "gk20a/css_gr_gk20a.h" | 39 | #include "gk20a/css_gr_gk20a.h" |
39 | #include "gk20a/mc_gk20a.h" | 40 | #include "gk20a/mc_gk20a.h" |
40 | #include "gk20a/flcn_gk20a.h" | 41 | #include "gk20a/flcn_gk20a.h" |
41 | #include "gk20a/priv_ring_gk20a.h" | ||
42 | #include "gk20a/regops_gk20a.h" | 42 | #include "gk20a/regops_gk20a.h" |
43 | #include "gk20a/pmu_gk20a.h" | 43 | #include "gk20a/pmu_gk20a.h" |
44 | #include "gk20a/gr_gk20a.h" | 44 | #include "gk20a/gr_gk20a.h" |
@@ -641,9 +641,11 @@ static const struct gpu_ops gm20b_ops = { | |||
641 | .falcon_hal_sw_init = gk20a_falcon_hal_sw_init, | 641 | .falcon_hal_sw_init = gk20a_falcon_hal_sw_init, |
642 | }, | 642 | }, |
643 | .priv_ring = { | 643 | .priv_ring = { |
644 | .isr = gk20a_priv_ring_isr, | 644 | .enable_priv_ring = gm20b_priv_ring_enable, |
645 | .isr = gm20b_priv_ring_isr, | ||
645 | .set_ppriv_timeout_settings = | 646 | .set_ppriv_timeout_settings = |
646 | gk20a_priv_set_timeout_settings, | 647 | gm20b_priv_set_timeout_settings, |
648 | .enum_ltc = gm20b_priv_ring_enum_ltc, | ||
647 | }, | 649 | }, |
648 | .fuse = { | 650 | .fuse = { |
649 | .check_priv_security = gm20b_fuse_check_priv_security, | 651 | .check_priv_security = gm20b_fuse_check_priv_security, |
diff --git a/drivers/gpu/nvgpu/gp106/hal_gp106.c b/drivers/gpu/nvgpu/gp106/hal_gp106.c index a2e76a00..90d25fa0 100644 --- a/drivers/gpu/nvgpu/gp106/hal_gp106.c +++ b/drivers/gpu/nvgpu/gp106/hal_gp106.c | |||
@@ -27,6 +27,8 @@ | |||
27 | #include "common/ptimer/ptimer_gk20a.h" | 27 | #include "common/ptimer/ptimer_gk20a.h" |
28 | #include "common/bus/bus_gm20b.h" | 28 | #include "common/bus/bus_gm20b.h" |
29 | #include "common/bus/bus_gp10b.h" | 29 | #include "common/bus/bus_gp10b.h" |
30 | #include "common/priv_ring/priv_ring_gm20b.h" | ||
31 | #include "common/priv_ring/priv_ring_gp10b.h" | ||
30 | #include "common/fb/fb_gk20a.h" | 32 | #include "common/fb/fb_gk20a.h" |
31 | #include "common/fb/fb_gp10b.h" | 33 | #include "common/fb/fb_gp10b.h" |
32 | #include "common/fb/fb_gm20b.h" | 34 | #include "common/fb/fb_gm20b.h" |
@@ -52,11 +54,9 @@ | |||
52 | #include "gp10b/mm_gp10b.h" | 54 | #include "gp10b/mm_gp10b.h" |
53 | #include "gp10b/ce_gp10b.h" | 55 | #include "gp10b/ce_gp10b.h" |
54 | #include "gp10b/regops_gp10b.h" | 56 | #include "gp10b/regops_gp10b.h" |
55 | #include "gp10b/priv_ring_gp10b.h" | ||
56 | #include "gp10b/fifo_gp10b.h" | 57 | #include "gp10b/fifo_gp10b.h" |
57 | #include "gp10b/pmu_gp10b.h" | 58 | #include "gp10b/pmu_gp10b.h" |
58 | #include "gp10b/gr_gp10b.h" | 59 | #include "gp10b/gr_gp10b.h" |
59 | #include "gp10b/priv_ring_gp10b.h" | ||
60 | #include "gp10b/fuse_gp10b.h" | 60 | #include "gp10b/fuse_gp10b.h" |
61 | 61 | ||
62 | #include "gp106/fifo_gp106.h" | 62 | #include "gp106/fifo_gp106.h" |
@@ -774,10 +774,12 @@ static const struct gpu_ops gp106_ops = { | |||
774 | .falcon_hal_sw_init = gp106_falcon_hal_sw_init, | 774 | .falcon_hal_sw_init = gp106_falcon_hal_sw_init, |
775 | }, | 775 | }, |
776 | .priv_ring = { | 776 | .priv_ring = { |
777 | .enable_priv_ring = gm20b_priv_ring_enable, | ||
777 | .isr = gp10b_priv_ring_isr, | 778 | .isr = gp10b_priv_ring_isr, |
778 | .decode_error_code = gp10b_priv_ring_decode_error_code, | 779 | .decode_error_code = gp10b_priv_ring_decode_error_code, |
779 | .set_ppriv_timeout_settings = | 780 | .set_ppriv_timeout_settings = |
780 | gk20a_priv_set_timeout_settings, | 781 | gm20b_priv_set_timeout_settings, |
782 | .enum_ltc = gm20b_priv_ring_enum_ltc, | ||
781 | }, | 783 | }, |
782 | .fuse = { | 784 | .fuse = { |
783 | .check_priv_security = gp106_fuse_check_priv_security, | 785 | .check_priv_security = gp106_fuse_check_priv_security, |
diff --git a/drivers/gpu/nvgpu/gp10b/hal_gp10b.c b/drivers/gpu/nvgpu/gp10b/hal_gp10b.c index 3d5eb231..5f55baa3 100644 --- a/drivers/gpu/nvgpu/gp10b/hal_gp10b.c +++ b/drivers/gpu/nvgpu/gp10b/hal_gp10b.c | |||
@@ -27,6 +27,8 @@ | |||
27 | #include "common/ptimer/ptimer_gk20a.h" | 27 | #include "common/ptimer/ptimer_gk20a.h" |
28 | #include "common/bus/bus_gm20b.h" | 28 | #include "common/bus/bus_gm20b.h" |
29 | #include "common/bus/bus_gp10b.h" | 29 | #include "common/bus/bus_gp10b.h" |
30 | #include "common/priv_ring/priv_ring_gm20b.h" | ||
31 | #include "common/priv_ring/priv_ring_gp10b.h" | ||
30 | #include "common/fb/fb_gk20a.h" | 32 | #include "common/fb/fb_gk20a.h" |
31 | #include "common/fb/fb_gm20b.h" | 33 | #include "common/fb/fb_gm20b.h" |
32 | #include "common/fb/fb_gp10b.h" | 34 | #include "common/fb/fb_gp10b.h" |
@@ -55,7 +57,6 @@ | |||
55 | #include "gp10b/fifo_gp10b.h" | 57 | #include "gp10b/fifo_gp10b.h" |
56 | #include "gp10b/regops_gp10b.h" | 58 | #include "gp10b/regops_gp10b.h" |
57 | #include "gp10b/therm_gp10b.h" | 59 | #include "gp10b/therm_gp10b.h" |
58 | #include "gp10b/priv_ring_gp10b.h" | ||
59 | #include "gp10b/ecc_gp10b.h" | 60 | #include "gp10b/ecc_gp10b.h" |
60 | 61 | ||
61 | #include "gm20b/ltc_gm20b.h" | 62 | #include "gm20b/ltc_gm20b.h" |
@@ -687,10 +688,12 @@ static const struct gpu_ops gp10b_ops = { | |||
687 | .falcon_hal_sw_init = gk20a_falcon_hal_sw_init, | 688 | .falcon_hal_sw_init = gk20a_falcon_hal_sw_init, |
688 | }, | 689 | }, |
689 | .priv_ring = { | 690 | .priv_ring = { |
691 | .enable_priv_ring = gm20b_priv_ring_enable, | ||
690 | .isr = gp10b_priv_ring_isr, | 692 | .isr = gp10b_priv_ring_isr, |
691 | .decode_error_code = gp10b_priv_ring_decode_error_code, | 693 | .decode_error_code = gp10b_priv_ring_decode_error_code, |
692 | .set_ppriv_timeout_settings = | 694 | .set_ppriv_timeout_settings = |
693 | gk20a_priv_set_timeout_settings, | 695 | gm20b_priv_set_timeout_settings, |
696 | .enum_ltc = gm20b_priv_ring_enum_ltc, | ||
694 | }, | 697 | }, |
695 | .fuse = { | 698 | .fuse = { |
696 | .check_priv_security = gp10b_fuse_check_priv_security, | 699 | .check_priv_security = gp10b_fuse_check_priv_security, |
diff --git a/drivers/gpu/nvgpu/gv100/hal_gv100.c b/drivers/gpu/nvgpu/gv100/hal_gv100.c index f6c3ec67..344ad1e8 100644 --- a/drivers/gpu/nvgpu/gv100/hal_gv100.c +++ b/drivers/gpu/nvgpu/gv100/hal_gv100.c | |||
@@ -25,6 +25,8 @@ | |||
25 | #include "common/bus/bus_gk20a.h" | 25 | #include "common/bus/bus_gk20a.h" |
26 | #include "common/bus/bus_gp10b.h" | 26 | #include "common/bus/bus_gp10b.h" |
27 | #include "common/bus/bus_gv100.h" | 27 | #include "common/bus/bus_gv100.h" |
28 | #include "common/priv_ring/priv_ring_gm20b.h" | ||
29 | #include "common/priv_ring/priv_ring_gp10b.h" | ||
28 | #include "common/clock_gating/gv100_gating_reglist.h" | 30 | #include "common/clock_gating/gv100_gating_reglist.h" |
29 | #include "common/ptimer/ptimer_gk20a.h" | 31 | #include "common/ptimer/ptimer_gk20a.h" |
30 | #include "common/fb/fb_gk20a.h" | 32 | #include "common/fb/fb_gk20a.h" |
@@ -68,7 +70,6 @@ | |||
68 | #include "gp10b/therm_gp10b.h" | 70 | #include "gp10b/therm_gp10b.h" |
69 | #include "gp10b/mc_gp10b.h" | 71 | #include "gp10b/mc_gp10b.h" |
70 | #include "gp10b/ce_gp10b.h" | 72 | #include "gp10b/ce_gp10b.h" |
71 | #include "gp10b/priv_ring_gp10b.h" | ||
72 | #include "gp10b/fifo_gp10b.h" | 73 | #include "gp10b/fifo_gp10b.h" |
73 | #include "gp10b/fecs_trace_gp10b.h" | 74 | #include "gp10b/fecs_trace_gp10b.h" |
74 | #include "gp10b/mm_gp10b.h" | 75 | #include "gp10b/mm_gp10b.h" |
@@ -868,10 +869,12 @@ static const struct gpu_ops gv100_ops = { | |||
868 | .falcon_hal_sw_init = gv100_falcon_hal_sw_init, | 869 | .falcon_hal_sw_init = gv100_falcon_hal_sw_init, |
869 | }, | 870 | }, |
870 | .priv_ring = { | 871 | .priv_ring = { |
872 | .enable_priv_ring = gm20b_priv_ring_enable, | ||
871 | .isr = gp10b_priv_ring_isr, | 873 | .isr = gp10b_priv_ring_isr, |
872 | .decode_error_code = gp10b_priv_ring_decode_error_code, | 874 | .decode_error_code = gp10b_priv_ring_decode_error_code, |
873 | .set_ppriv_timeout_settings = | 875 | .set_ppriv_timeout_settings = |
874 | gk20a_priv_set_timeout_settings, | 876 | gm20b_priv_set_timeout_settings, |
877 | .enum_ltc = gm20b_priv_ring_enum_ltc, | ||
875 | }, | 878 | }, |
876 | .fuse = { | 879 | .fuse = { |
877 | .is_opt_ecc_enable = gp10b_fuse_is_opt_ecc_enable, | 880 | .is_opt_ecc_enable = gp10b_fuse_is_opt_ecc_enable, |
diff --git a/drivers/gpu/nvgpu/gv11b/hal_gv11b.c b/drivers/gpu/nvgpu/gv11b/hal_gv11b.c index 20a0b34f..05763cce 100644 --- a/drivers/gpu/nvgpu/gv11b/hal_gv11b.c +++ b/drivers/gpu/nvgpu/gv11b/hal_gv11b.c | |||
@@ -25,6 +25,8 @@ | |||
25 | #include "common/bus/bus_gk20a.h" | 25 | #include "common/bus/bus_gk20a.h" |
26 | #include "common/bus/bus_gp10b.h" | 26 | #include "common/bus/bus_gp10b.h" |
27 | #include "common/bus/bus_gm20b.h" | 27 | #include "common/bus/bus_gm20b.h" |
28 | #include "common/priv_ring/priv_ring_gm20b.h" | ||
29 | #include "common/priv_ring/priv_ring_gp10b.h" | ||
28 | #include "common/clock_gating/gv11b_gating_reglist.h" | 30 | #include "common/clock_gating/gv11b_gating_reglist.h" |
29 | #include "common/ptimer/ptimer_gk20a.h" | 31 | #include "common/ptimer/ptimer_gk20a.h" |
30 | #include "common/fb/fb_gk20a.h" | 32 | #include "common/fb/fb_gk20a.h" |
@@ -55,7 +57,6 @@ | |||
55 | #include "gp10b/therm_gp10b.h" | 57 | #include "gp10b/therm_gp10b.h" |
56 | #include "gp10b/mc_gp10b.h" | 58 | #include "gp10b/mc_gp10b.h" |
57 | #include "gp10b/ce_gp10b.h" | 59 | #include "gp10b/ce_gp10b.h" |
58 | #include "gp10b/priv_ring_gp10b.h" | ||
59 | #include "gp10b/fifo_gp10b.h" | 60 | #include "gp10b/fifo_gp10b.h" |
60 | #include "gp10b/fecs_trace_gp10b.h" | 61 | #include "gp10b/fecs_trace_gp10b.h" |
61 | #include "gp10b/mm_gp10b.h" | 62 | #include "gp10b/mm_gp10b.h" |
@@ -786,10 +787,12 @@ static const struct gpu_ops gv11b_ops = { | |||
786 | .falcon_hal_sw_init = gk20a_falcon_hal_sw_init, | 787 | .falcon_hal_sw_init = gk20a_falcon_hal_sw_init, |
787 | }, | 788 | }, |
788 | .priv_ring = { | 789 | .priv_ring = { |
790 | .enable_priv_ring = gm20b_priv_ring_enable, | ||
789 | .isr = gp10b_priv_ring_isr, | 791 | .isr = gp10b_priv_ring_isr, |
790 | .decode_error_code = gp10b_priv_ring_decode_error_code, | 792 | .decode_error_code = gp10b_priv_ring_decode_error_code, |
791 | .set_ppriv_timeout_settings = | 793 | .set_ppriv_timeout_settings = |
792 | gk20a_priv_set_timeout_settings, | 794 | gm20b_priv_set_timeout_settings, |
795 | .enum_ltc = gm20b_priv_ring_enum_ltc, | ||
793 | }, | 796 | }, |
794 | .fuse = { | 797 | .fuse = { |
795 | .check_priv_security = gp10b_fuse_check_priv_security, | 798 | .check_priv_security = gp10b_fuse_check_priv_security, |
diff --git a/drivers/gpu/nvgpu/gv11b/ltc_gv11b.c b/drivers/gpu/nvgpu/gv11b/ltc_gv11b.c index 32f72208..d7c385a9 100644 --- a/drivers/gpu/nvgpu/gv11b/ltc_gv11b.c +++ b/drivers/gpu/nvgpu/gv11b/ltc_gv11b.c | |||
@@ -32,7 +32,6 @@ | |||
32 | #include <nvgpu/hw/gv11b/hw_mc_gv11b.h> | 32 | #include <nvgpu/hw/gv11b/hw_mc_gv11b.h> |
33 | #include <nvgpu/hw/gv11b/hw_top_gv11b.h> | 33 | #include <nvgpu/hw/gv11b/hw_top_gv11b.h> |
34 | #include <nvgpu/hw/gv11b/hw_mc_gv11b.h> | 34 | #include <nvgpu/hw/gv11b/hw_mc_gv11b.h> |
35 | #include <nvgpu/hw/gv11b/hw_pri_ringmaster_gv11b.h> | ||
36 | 35 | ||
37 | #include <nvgpu/utils.h> | 36 | #include <nvgpu/utils.h> |
38 | 37 | ||
@@ -62,7 +61,7 @@ void gv11b_ltc_init_fs_state(struct gk20a *g) | |||
62 | nvgpu_log_info(g, "initialize gv11b l2"); | 61 | nvgpu_log_info(g, "initialize gv11b l2"); |
63 | 62 | ||
64 | g->max_ltc_count = gk20a_readl(g, top_num_ltcs_r()); | 63 | g->max_ltc_count = gk20a_readl(g, top_num_ltcs_r()); |
65 | g->ltc_count = gk20a_readl(g, pri_ringmaster_enum_ltc_r()); | 64 | g->ltc_count = g->ops.priv_ring.enum_ltc(g); |
66 | nvgpu_log_info(g, "%u ltcs out of %u", g->ltc_count, g->max_ltc_count); | 65 | nvgpu_log_info(g, "%u ltcs out of %u", g->ltc_count, g->max_ltc_count); |
67 | 66 | ||
68 | reg = gk20a_readl(g, ltc_ltcs_ltss_cbc_param_r()); | 67 | reg = gk20a_readl(g, ltc_ltcs_ltss_cbc_param_r()); |
diff --git a/drivers/gpu/nvgpu/vgpu/gp10b/vgpu_hal_gp10b.c b/drivers/gpu/nvgpu/vgpu/gp10b/vgpu_hal_gp10b.c index a8aa023b..15e2717d 100644 --- a/drivers/gpu/nvgpu/vgpu/gp10b/vgpu_hal_gp10b.c +++ b/drivers/gpu/nvgpu/vgpu/gp10b/vgpu_hal_gp10b.c | |||
@@ -22,6 +22,8 @@ | |||
22 | 22 | ||
23 | #include "common/bus/bus_gk20a.h" | 23 | #include "common/bus/bus_gk20a.h" |
24 | #include "common/bus/bus_gm20b.h" | 24 | #include "common/bus/bus_gm20b.h" |
25 | #include "common/priv_ring/priv_ring_gm20b.h" | ||
26 | #include "common/priv_ring/priv_ring_gp10b.h" | ||
25 | #include "common/clock_gating/gp10b_gating_reglist.h" | 27 | #include "common/clock_gating/gp10b_gating_reglist.h" |
26 | #include "common/fb/fb_gk20a.h" | 28 | #include "common/fb/fb_gk20a.h" |
27 | #include "common/fb/fb_gm20b.h" | 29 | #include "common/fb/fb_gm20b.h" |
@@ -55,7 +57,6 @@ | |||
55 | #include "gp10b/fifo_gp10b.h" | 57 | #include "gp10b/fifo_gp10b.h" |
56 | #include "gp10b/regops_gp10b.h" | 58 | #include "gp10b/regops_gp10b.h" |
57 | #include "gp10b/therm_gp10b.h" | 59 | #include "gp10b/therm_gp10b.h" |
58 | #include "gp10b/priv_ring_gp10b.h" | ||
59 | #include "gp10b/fuse_gp10b.h" | 60 | #include "gp10b/fuse_gp10b.h" |
60 | 61 | ||
61 | #include "gm20b/ltc_gm20b.h" | 62 | #include "gm20b/ltc_gm20b.h" |
@@ -552,9 +553,11 @@ static const struct gpu_ops vgpu_gp10b_ops = { | |||
552 | .falcon_hal_sw_init = gk20a_falcon_hal_sw_init, | 553 | .falcon_hal_sw_init = gk20a_falcon_hal_sw_init, |
553 | }, | 554 | }, |
554 | .priv_ring = { | 555 | .priv_ring = { |
556 | .enable_priv_ring = gm20b_priv_ring_enable, | ||
555 | .isr = gp10b_priv_ring_isr, | 557 | .isr = gp10b_priv_ring_isr, |
556 | .set_ppriv_timeout_settings = | 558 | .set_ppriv_timeout_settings = |
557 | gk20a_priv_set_timeout_settings, | 559 | gm20b_priv_set_timeout_settings, |
560 | .enum_ltc = gm20b_priv_ring_enum_ltc, | ||
558 | }, | 561 | }, |
559 | .fuse = { | 562 | .fuse = { |
560 | .check_priv_security = vgpu_gp10b_fuse_check_priv_security, | 563 | .check_priv_security = vgpu_gp10b_fuse_check_priv_security, |
diff --git a/drivers/gpu/nvgpu/vgpu/gv11b/vgpu_hal_gv11b.c b/drivers/gpu/nvgpu/vgpu/gv11b/vgpu_hal_gv11b.c index b91691e2..995a2c2c 100644 --- a/drivers/gpu/nvgpu/vgpu/gv11b/vgpu_hal_gv11b.c +++ b/drivers/gpu/nvgpu/vgpu/gv11b/vgpu_hal_gv11b.c | |||
@@ -22,6 +22,8 @@ | |||
22 | 22 | ||
23 | #include "common/bus/bus_gk20a.h" | 23 | #include "common/bus/bus_gk20a.h" |
24 | #include "common/bus/bus_gm20b.h" | 24 | #include "common/bus/bus_gm20b.h" |
25 | #include "common/priv_ring/priv_ring_gm20b.h" | ||
26 | #include "common/priv_ring/priv_ring_gp10b.h" | ||
25 | #include "common/clock_gating/gv11b_gating_reglist.h" | 27 | #include "common/clock_gating/gv11b_gating_reglist.h" |
26 | #include "common/fb/fb_gk20a.h" | 28 | #include "common/fb/fb_gk20a.h" |
27 | #include "common/fb/fb_gm20b.h" | 29 | #include "common/fb/fb_gm20b.h" |
@@ -62,7 +64,6 @@ | |||
62 | #include "gp10b/gr_gp10b.h" | 64 | #include "gp10b/gr_gp10b.h" |
63 | #include <gp10b/fifo_gp10b.h> | 65 | #include <gp10b/fifo_gp10b.h> |
64 | #include <gp10b/therm_gp10b.h> | 66 | #include <gp10b/therm_gp10b.h> |
65 | #include <gp10b/priv_ring_gp10b.h> | ||
66 | #include <gp10b/ltc_gp10b.h> | 67 | #include <gp10b/ltc_gp10b.h> |
67 | #include <gp10b/fuse_gp10b.h> | 68 | #include <gp10b/fuse_gp10b.h> |
68 | 69 | ||
@@ -622,9 +623,11 @@ static const struct gpu_ops vgpu_gv11b_ops = { | |||
622 | .falcon_hal_sw_init = gk20a_falcon_hal_sw_init, | 623 | .falcon_hal_sw_init = gk20a_falcon_hal_sw_init, |
623 | }, | 624 | }, |
624 | .priv_ring = { | 625 | .priv_ring = { |
626 | .enable_priv_ring = gm20b_priv_ring_enable, | ||
625 | .isr = gp10b_priv_ring_isr, | 627 | .isr = gp10b_priv_ring_isr, |
626 | .set_ppriv_timeout_settings = | 628 | .set_ppriv_timeout_settings = |
627 | gk20a_priv_set_timeout_settings, | 629 | gm20b_priv_set_timeout_settings, |
630 | .enum_ltc = gm20b_priv_ring_enum_ltc, | ||
628 | }, | 631 | }, |
629 | .fuse = { | 632 | .fuse = { |
630 | .is_opt_ecc_enable = gp10b_fuse_is_opt_ecc_enable, | 633 | .is_opt_ecc_enable = gp10b_fuse_is_opt_ecc_enable, |