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-rw-r--r--drivers/gpu/nvgpu/Makefile1
-rw-r--r--drivers/gpu/nvgpu/gk20a/gk20a.h1
-rw-r--r--drivers/gpu/nvgpu/gk20a/mm_gk20a.c15
-rw-r--r--drivers/gpu/nvgpu/gk20a/mm_gk20a.h2
-rw-r--r--drivers/gpu/nvgpu/gm206/hal_gm206.c3
-rw-r--r--drivers/gpu/nvgpu/gm206/hw_fbpa_gm206.h61
-rw-r--r--drivers/gpu/nvgpu/gm206/hw_top_gm206.h8
-rw-r--r--drivers/gpu/nvgpu/gm206/mm_gm206.c35
-rw-r--r--drivers/gpu/nvgpu/gm206/mm_gm206.h24
9 files changed, 149 insertions, 1 deletions
diff --git a/drivers/gpu/nvgpu/Makefile b/drivers/gpu/nvgpu/Makefile
index 9e60e6a5..1bc2b9cc 100644
--- a/drivers/gpu/nvgpu/Makefile
+++ b/drivers/gpu/nvgpu/Makefile
@@ -80,6 +80,7 @@ nvgpu-y := \
80 gm206/hal_gm206.o \ 80 gm206/hal_gm206.o \
81 gm206/gr_gm206.o \ 81 gm206/gr_gm206.o \
82 gm206/acr_gm206.o \ 82 gm206/acr_gm206.o \
83 gm206/mm_gm206.o \
83 gm206/pmu_gm206.o \ 84 gm206/pmu_gm206.o \
84 gm206/ce_gm206.o 85 gm206/ce_gm206.o
85 86
diff --git a/drivers/gpu/nvgpu/gk20a/gk20a.h b/drivers/gpu/nvgpu/gk20a/gk20a.h
index c7d12f86..6622dad0 100644
--- a/drivers/gpu/nvgpu/gk20a/gk20a.h
+++ b/drivers/gpu/nvgpu/gk20a/gk20a.h
@@ -524,6 +524,7 @@ struct gpu_ops {
524 u64 (*get_iova_addr)(struct gk20a *g, struct scatterlist *sgl, 524 u64 (*get_iova_addr)(struct gk20a *g, struct scatterlist *sgl,
525 u32 flags); 525 u32 flags);
526 int (*bar1_bind)(struct gk20a *g, u64 bar1_iova); 526 int (*bar1_bind)(struct gk20a *g, u64 bar1_iova);
527 size_t (*get_vidmem_size)(struct gk20a *g);
527 } mm; 528 } mm;
528 struct { 529 struct {
529 int (*init_therm_setup_hw)(struct gk20a *g); 530 int (*init_therm_setup_hw)(struct gk20a *g);
diff --git a/drivers/gpu/nvgpu/gk20a/mm_gk20a.c b/drivers/gpu/nvgpu/gk20a/mm_gk20a.c
index 6505015f..60c1b7ea 100644
--- a/drivers/gpu/nvgpu/gk20a/mm_gk20a.c
+++ b/drivers/gpu/nvgpu/gk20a/mm_gk20a.c
@@ -613,6 +613,20 @@ static void gk20a_init_pramin(struct mm_gk20a *mm)
613 mm->force_pramin = GK20A_FORCE_PRAMIN_DEFAULT; 613 mm->force_pramin = GK20A_FORCE_PRAMIN_DEFAULT;
614} 614}
615 615
616static int gk20a_init_vidmem(struct mm_gk20a *mm)
617{
618 struct gk20a *g = mm->g;
619 size_t size = g->ops.mm.get_vidmem_size ?
620 g->ops.mm.get_vidmem_size(g) : 0;
621
622 if (!size)
623 return 0;
624
625 mm->vidmem_size = size;
626
627 return 0;
628}
629
616int gk20a_init_mm_setup_sw(struct gk20a *g) 630int gk20a_init_mm_setup_sw(struct gk20a *g)
617{ 631{
618 struct mm_gk20a *mm = &g->mm; 632 struct mm_gk20a *mm = &g->mm;
@@ -637,6 +651,7 @@ int gk20a_init_mm_setup_sw(struct gk20a *g)
637 (int)(mm->channel.kernel_size >> 20)); 651 (int)(mm->channel.kernel_size >> 20));
638 652
639 gk20a_init_pramin(mm); 653 gk20a_init_pramin(mm);
654 gk20a_init_vidmem(mm);
640 655
641 err = gk20a_alloc_sysmem_flush(g); 656 err = gk20a_alloc_sysmem_flush(g);
642 if (err) 657 if (err)
diff --git a/drivers/gpu/nvgpu/gk20a/mm_gk20a.h b/drivers/gpu/nvgpu/gk20a/mm_gk20a.h
index e83e1111..590ede71 100644
--- a/drivers/gpu/nvgpu/gk20a/mm_gk20a.h
+++ b/drivers/gpu/nvgpu/gk20a/mm_gk20a.h
@@ -372,6 +372,8 @@ struct mm_gk20a {
372#else 372#else
373 bool force_pramin; /* via debugfs */ 373 bool force_pramin; /* via debugfs */
374#endif 374#endif
375
376 size_t vidmem_size;
375}; 377};
376 378
377int gk20a_mm_init(struct mm_gk20a *mm); 379int gk20a_mm_init(struct mm_gk20a *mm);
diff --git a/drivers/gpu/nvgpu/gm206/hal_gm206.c b/drivers/gpu/nvgpu/gm206/hal_gm206.c
index 6b5c70e2..f6034aca 100644
--- a/drivers/gpu/nvgpu/gm206/hal_gm206.c
+++ b/drivers/gpu/nvgpu/gm206/hal_gm206.c
@@ -21,6 +21,7 @@
21#include "gm20b/mc_gm20b.h" 21#include "gm20b/mc_gm20b.h"
22#include "gm20b/ltc_gm20b.h" 22#include "gm20b/ltc_gm20b.h"
23#include "gm20b/mm_gm20b.h" 23#include "gm20b/mm_gm20b.h"
24#include "gm206/mm_gm206.h"
24#include "ce_gm206.h" 25#include "ce_gm206.h"
25#include "gm20b/fb_gm20b.h" 26#include "gm20b/fb_gm20b.h"
26#include "gm20b/pmu_gm20b.h" 27#include "gm20b/pmu_gm20b.h"
@@ -188,7 +189,7 @@ int gm206_init_hal(struct gk20a *g)
188 gm206_init_fifo(gops); 189 gm206_init_fifo(gops);
189 gm206_init_ce(gops); 190 gm206_init_ce(gops);
190 gm20b_init_gr_ctx(gops); 191 gm20b_init_gr_ctx(gops);
191 gm20b_init_mm(gops); 192 gm206_init_mm(gops);
192 gm206_init_pmu_ops(gops); 193 gm206_init_pmu_ops(gops);
193 gm20b_init_clk_ops(gops); 194 gm20b_init_clk_ops(gops);
194 gm20b_init_regops(gops); 195 gm20b_init_regops(gops);
diff --git a/drivers/gpu/nvgpu/gm206/hw_fbpa_gm206.h b/drivers/gpu/nvgpu/gm206/hw_fbpa_gm206.h
new file mode 100644
index 00000000..3a1d1981
--- /dev/null
+++ b/drivers/gpu/nvgpu/gm206/hw_fbpa_gm206.h
@@ -0,0 +1,61 @@
1/*
2 * Copyright (c) 2016, NVIDIA CORPORATION. All rights reserved.
3 *
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms and conditions of the GNU General Public License,
6 * version 2, as published by the Free Software Foundation.
7 *
8 * This program is distributed in the hope it will be useful, but WITHOUT
9 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
10 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
11 * more details.
12 *
13 * You should have received a copy of the GNU General Public License
14 * along with this program. If not, see <http://www.gnu.org/licenses/>.
15 */
16/*
17 * Function naming determines intended use:
18 *
19 * <x>_r(void) : Returns the offset for register <x>.
20 *
21 * <x>_o(void) : Returns the offset for element <x>.
22 *
23 * <x>_w(void) : Returns the word offset for word (4 byte) element <x>.
24 *
25 * <x>_<y>_s(void) : Returns size of field <y> of register <x> in bits.
26 *
27 * <x>_<y>_f(u32 v) : Returns a value based on 'v' which has been shifted
28 * and masked to place it at field <y> of register <x>. This value
29 * can be |'d with others to produce a full register value for
30 * register <x>.
31 *
32 * <x>_<y>_m(void) : Returns a mask for field <y> of register <x>. This
33 * value can be ~'d and then &'d to clear the value of field <y> for
34 * register <x>.
35 *
36 * <x>_<y>_<z>_f(void) : Returns the constant value <z> after being shifted
37 * to place it at field <y> of register <x>. This value can be |'d
38 * with others to produce a full register value for <x>.
39 *
40 * <x>_<y>_v(u32 r) : Returns the value of field <y> from a full register
41 * <x> value 'r' after being shifted to place its LSB at bit 0.
42 * This value is suitable for direct comparison with other unshifted
43 * values appropriate for use in field <y> of register <x>.
44 *
45 * <x>_<y>_<z>_v(void) : Returns the constant value for <z> defined for
46 * field <y> of register <x>. This value is suitable for direct
47 * comparison with unshifted values appropriate for use in field <y>
48 * of register <x>.
49 */
50#ifndef _hw_fbpa_gp106_h_
51#define _hw_fbpa_gp106_h_
52
53static inline u32 fbpa_cstatus_r(void)
54{
55 return 0x0010f20c;
56}
57static inline u32 fbpa_cstatus_ramamount_v(u32 r)
58{
59 return (r >> 0) & 0x1ffff;
60}
61#endif
diff --git a/drivers/gpu/nvgpu/gm206/hw_top_gm206.h b/drivers/gpu/nvgpu/gm206/hw_top_gm206.h
index 988f24ea..b0d571cf 100644
--- a/drivers/gpu/nvgpu/gm206/hw_top_gm206.h
+++ b/drivers/gpu/nvgpu/gm206/hw_top_gm206.h
@@ -74,6 +74,14 @@ static inline u32 top_num_fbps_value_v(u32 r)
74{ 74{
75 return (r >> 0) & 0x1f; 75 return (r >> 0) & 0x1f;
76} 76}
77static inline u32 top_num_fbpas_r(void)
78{
79 return 0x0002243c;
80}
81static inline u32 top_num_fbpas_value_v(u32 r)
82{
83 return (r >> 0) & 0x1f;
84}
77static inline u32 top_ltc_per_fbp_r(void) 85static inline u32 top_ltc_per_fbp_r(void)
78{ 86{
79 return 0x00022450; 87 return 0x00022450;
diff --git a/drivers/gpu/nvgpu/gm206/mm_gm206.c b/drivers/gpu/nvgpu/gm206/mm_gm206.c
new file mode 100644
index 00000000..c3763d58
--- /dev/null
+++ b/drivers/gpu/nvgpu/gm206/mm_gm206.c
@@ -0,0 +1,35 @@
1/*
2 * GM206 memory management
3 *
4 * Copyright (c) 2016, NVIDIA CORPORATION. All rights reserved.
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms and conditions of the GNU General Public License,
8 * version 2, as published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 * more details.
14 */
15
16#include "gk20a/gk20a.h"
17#include "gm20b/mm_gm20b.h"
18
19#include "hw_fbpa_gm206.h"
20#include "hw_top_gm206.h"
21
22static size_t gm206_mm_get_vidmem_size(struct gk20a *g)
23{
24 u32 fbpas = top_num_fbpas_value_v(
25 gk20a_readl(g, top_num_fbpas_r()));
26 u32 ram = fbpa_cstatus_ramamount_v(
27 gk20a_readl(g, fbpa_cstatus_r()));
28 return (size_t)fbpas * ram * SZ_1M;
29}
30
31void gm206_init_mm(struct gpu_ops *gops)
32{
33 gm20b_init_mm(gops);
34 gops->mm.get_vidmem_size = gm206_mm_get_vidmem_size;
35}
diff --git a/drivers/gpu/nvgpu/gm206/mm_gm206.h b/drivers/gpu/nvgpu/gm206/mm_gm206.h
new file mode 100644
index 00000000..60aa6fe4
--- /dev/null
+++ b/drivers/gpu/nvgpu/gm206/mm_gm206.h
@@ -0,0 +1,24 @@
1/*
2 * GM206 memory management
3 *
4 * Copyright (c) 2016, NVIDIA CORPORATION. All rights reserved.
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms and conditions of the GNU General Public License,
8 * version 2, as published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 * more details.
14 */
15
16#ifndef MM_GM206_H
17#define MM_GM206_H
18
19struct gpu_ops;
20
21void gm206_init_mm(struct gpu_ops *gops);
22
23#endif
24