diff options
-rw-r--r-- | drivers/gpu/nvgpu/gp10b/gr_gp10b.c | 5 |
1 files changed, 3 insertions, 2 deletions
diff --git a/drivers/gpu/nvgpu/gp10b/gr_gp10b.c b/drivers/gpu/nvgpu/gp10b/gr_gp10b.c index 271a6d0c..4d0de15f 100644 --- a/drivers/gpu/nvgpu/gp10b/gr_gp10b.c +++ b/drivers/gpu/nvgpu/gp10b/gr_gp10b.c | |||
@@ -664,8 +664,9 @@ static void gr_gp10b_update_ctxsw_preemption_mode(struct gk20a *g, | |||
664 | 664 | ||
665 | addr = (u64_lo32(gr_ctx->t18x.spill_ctxsw_buffer.gpu_va) >> | 665 | addr = (u64_lo32(gr_ctx->t18x.spill_ctxsw_buffer.gpu_va) >> |
666 | gr_gpc0_swdx_rm_spill_buffer_addr_39_8_align_bits_v()) | | 666 | gr_gpc0_swdx_rm_spill_buffer_addr_39_8_align_bits_v()) | |
667 | (u64_hi32(gr_ctx->t18x.pagepool_ctxsw_buffer.gpu_va) << | 667 | (u64_hi32(gr_ctx->t18x.spill_ctxsw_buffer.gpu_va) << |
668 | (32 - gr_gpc0_swdx_rm_spill_buffer_addr_39_8_align_bits_v())); | 668 | (32 - gr_gpc0_swdx_rm_spill_buffer_addr_39_8_align_bits_v())); |
669 | size = gr_ctx->t18x.spill_ctxsw_buffer.size; | ||
669 | 670 | ||
670 | gr_gk20a_ctx_patch_write(g, ch_ctx, | 671 | gr_gk20a_ctx_patch_write(g, ch_ctx, |
671 | gr_gpc0_swdx_rm_spill_buffer_addr_r(), | 672 | gr_gpc0_swdx_rm_spill_buffer_addr_r(), |
@@ -673,7 +674,7 @@ static void gr_gp10b_update_ctxsw_preemption_mode(struct gk20a *g, | |||
673 | true); | 674 | true); |
674 | gr_gk20a_ctx_patch_write(g, ch_ctx, | 675 | gr_gk20a_ctx_patch_write(g, ch_ctx, |
675 | gr_gpc0_swdx_rm_spill_buffer_size_r(), | 676 | gr_gpc0_swdx_rm_spill_buffer_size_r(), |
676 | gr_gpc0_swdx_rm_spill_buffer_size_256b_f(addr), | 677 | gr_gpc0_swdx_rm_spill_buffer_size_256b_f(size), |
677 | true); | 678 | true); |
678 | 679 | ||
679 | cbes_reserve = gr_gpcs_swdx_beta_cb_ctrl_cbes_reserve_gfxp_v(); | 680 | cbes_reserve = gr_gpcs_swdx_beta_cb_ctrl_cbes_reserve_gfxp_v(); |