diff options
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/gk20a.h | 1 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/tsg_gk20a.c | 14 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/vgpu/tsg_vgpu.c | 23 | ||||
-rw-r--r-- | include/linux/tegra_vgpu.h | 6 |
4 files changed, 44 insertions, 0 deletions
diff --git a/drivers/gpu/nvgpu/gk20a/gk20a.h b/drivers/gpu/nvgpu/gk20a/gk20a.h index ed3a1d2d..f492801e 100644 --- a/drivers/gpu/nvgpu/gk20a/gk20a.h +++ b/drivers/gpu/nvgpu/gk20a/gk20a.h | |||
@@ -392,6 +392,7 @@ struct gpu_ops { | |||
392 | int (*tsg_bind_channel)(struct tsg_gk20a *tsg, | 392 | int (*tsg_bind_channel)(struct tsg_gk20a *tsg, |
393 | struct channel_gk20a *ch); | 393 | struct channel_gk20a *ch); |
394 | int (*tsg_unbind_channel)(struct channel_gk20a *ch); | 394 | int (*tsg_unbind_channel)(struct channel_gk20a *ch); |
395 | int (*tsg_open)(struct tsg_gk20a *tsg); | ||
395 | u32 (*eng_runlist_base_size)(void); | 396 | u32 (*eng_runlist_base_size)(void); |
396 | int (*init_engine_info)(struct fifo_gk20a *f); | 397 | int (*init_engine_info)(struct fifo_gk20a *f); |
397 | u32 (*runlist_entry_size)(void); | 398 | u32 (*runlist_entry_size)(void); |
diff --git a/drivers/gpu/nvgpu/gk20a/tsg_gk20a.c b/drivers/gpu/nvgpu/gk20a/tsg_gk20a.c index 43ee79cd..fc36c0c7 100644 --- a/drivers/gpu/nvgpu/gk20a/tsg_gk20a.c +++ b/drivers/gpu/nvgpu/gk20a/tsg_gk20a.c | |||
@@ -402,6 +402,7 @@ int gk20a_tsg_open(struct gk20a *g, struct file *filp) | |||
402 | { | 402 | { |
403 | struct tsg_gk20a *tsg; | 403 | struct tsg_gk20a *tsg; |
404 | struct device *dev; | 404 | struct device *dev; |
405 | int err; | ||
405 | 406 | ||
406 | dev = dev_from_gk20a(g); | 407 | dev = dev_from_gk20a(g); |
407 | 408 | ||
@@ -426,11 +427,24 @@ int gk20a_tsg_open(struct gk20a *g, struct file *filp) | |||
426 | 427 | ||
427 | filp->private_data = tsg; | 428 | filp->private_data = tsg; |
428 | 429 | ||
430 | if (g->ops.fifo.tsg_open) { | ||
431 | err = g->ops.fifo.tsg_open(tsg); | ||
432 | if (err) { | ||
433 | gk20a_err(dev, "tsg %d fifo open failed %d", | ||
434 | tsg->tsgid, err); | ||
435 | goto clean_up; | ||
436 | } | ||
437 | } | ||
438 | |||
429 | gk20a_dbg(gpu_dbg_fn, "tsg opened %d\n", tsg->tsgid); | 439 | gk20a_dbg(gpu_dbg_fn, "tsg opened %d\n", tsg->tsgid); |
430 | 440 | ||
431 | gk20a_sched_ctrl_tsg_added(g, tsg); | 441 | gk20a_sched_ctrl_tsg_added(g, tsg); |
432 | 442 | ||
433 | return 0; | 443 | return 0; |
444 | |||
445 | clean_up: | ||
446 | kref_put(&tsg->refcount, gk20a_tsg_release); | ||
447 | return err; | ||
434 | } | 448 | } |
435 | 449 | ||
436 | int gk20a_tsg_dev_open(struct inode *inode, struct file *filp) | 450 | int gk20a_tsg_dev_open(struct inode *inode, struct file *filp) |
diff --git a/drivers/gpu/nvgpu/vgpu/tsg_vgpu.c b/drivers/gpu/nvgpu/vgpu/tsg_vgpu.c index 2033fd7a..9daf9e6d 100644 --- a/drivers/gpu/nvgpu/vgpu/tsg_vgpu.c +++ b/drivers/gpu/nvgpu/vgpu/tsg_vgpu.c | |||
@@ -23,6 +23,28 @@ | |||
23 | #include "gk20a/tsg_gk20a.h" | 23 | #include "gk20a/tsg_gk20a.h" |
24 | #include "vgpu.h" | 24 | #include "vgpu.h" |
25 | 25 | ||
26 | static int vgpu_tsg_open(struct tsg_gk20a *tsg) | ||
27 | { | ||
28 | struct tegra_vgpu_cmd_msg msg = {}; | ||
29 | struct tegra_vgpu_tsg_open_params *p = | ||
30 | &msg.params.tsg_open; | ||
31 | int err; | ||
32 | |||
33 | gk20a_dbg_fn(""); | ||
34 | |||
35 | msg.cmd = TEGRA_VGPU_CMD_TSG_OPEN; | ||
36 | msg.handle = vgpu_get_handle(tsg->g); | ||
37 | p->tsg_id = tsg->tsgid; | ||
38 | err = vgpu_comm_sendrecv(&msg, sizeof(msg), sizeof(msg)); | ||
39 | err = err ? err : msg.ret; | ||
40 | if (err) { | ||
41 | gk20a_err(dev_from_gk20a(tsg->g), | ||
42 | "vgpu_tsg_open failed, tsgid %d", tsg->tsgid); | ||
43 | } | ||
44 | |||
45 | return err; | ||
46 | } | ||
47 | |||
26 | static int vgpu_tsg_bind_channel(struct tsg_gk20a *tsg, | 48 | static int vgpu_tsg_bind_channel(struct tsg_gk20a *tsg, |
27 | struct channel_gk20a *ch) | 49 | struct channel_gk20a *ch) |
28 | { | 50 | { |
@@ -101,4 +123,5 @@ void vgpu_init_tsg_ops(struct gpu_ops *gops) | |||
101 | gops->fifo.tsg_bind_channel = vgpu_tsg_bind_channel; | 123 | gops->fifo.tsg_bind_channel = vgpu_tsg_bind_channel; |
102 | gops->fifo.tsg_unbind_channel = vgpu_tsg_unbind_channel; | 124 | gops->fifo.tsg_unbind_channel = vgpu_tsg_unbind_channel; |
103 | gops->fifo.tsg_set_timeslice = vgpu_tsg_set_timeslice; | 125 | gops->fifo.tsg_set_timeslice = vgpu_tsg_set_timeslice; |
126 | gops->fifo.tsg_open = vgpu_tsg_open; | ||
104 | } | 127 | } |
diff --git a/include/linux/tegra_vgpu.h b/include/linux/tegra_vgpu.h index 456622a4..79698d23 100644 --- a/include/linux/tegra_vgpu.h +++ b/include/linux/tegra_vgpu.h | |||
@@ -98,6 +98,7 @@ enum { | |||
98 | TEGRA_VGPU_CMD_SET_GPU_CLK_RATE = 61, | 98 | TEGRA_VGPU_CMD_SET_GPU_CLK_RATE = 61, |
99 | TEGRA_VGPU_CMD_GET_CONSTANTS = 62, | 99 | TEGRA_VGPU_CMD_GET_CONSTANTS = 62, |
100 | TEGRA_VGPU_CMD_CHANNEL_CYCLESTATS_SNAPSHOT = 63, | 100 | TEGRA_VGPU_CMD_CHANNEL_CYCLESTATS_SNAPSHOT = 63, |
101 | TEGRA_VGPU_CMD_TSG_OPEN = 64, | ||
101 | }; | 102 | }; |
102 | 103 | ||
103 | struct tegra_vgpu_connect_params { | 104 | struct tegra_vgpu_connect_params { |
@@ -387,6 +388,10 @@ struct tegra_vgpu_tsg_timeslice_params { | |||
387 | u32 timeslice_us; | 388 | u32 timeslice_us; |
388 | }; | 389 | }; |
389 | 390 | ||
391 | struct tegra_vgpu_tsg_open_params { | ||
392 | u32 tsg_id; | ||
393 | }; | ||
394 | |||
390 | /* level follows nvgpu.h definitions */ | 395 | /* level follows nvgpu.h definitions */ |
391 | struct tegra_vgpu_tsg_runlist_interleave_params { | 396 | struct tegra_vgpu_tsg_runlist_interleave_params { |
392 | u32 tsg_id; | 397 | u32 tsg_id; |
@@ -486,6 +491,7 @@ struct tegra_vgpu_cmd_msg { | |||
486 | struct tegra_vgpu_channel_bind_gr_ctx_params ch_bind_gr_ctx; | 491 | struct tegra_vgpu_channel_bind_gr_ctx_params ch_bind_gr_ctx; |
487 | struct tegra_vgpu_tsg_bind_gr_ctx_params tsg_bind_gr_ctx; | 492 | struct tegra_vgpu_tsg_bind_gr_ctx_params tsg_bind_gr_ctx; |
488 | struct tegra_vgpu_tsg_bind_unbind_channel_params tsg_bind_unbind_channel; | 493 | struct tegra_vgpu_tsg_bind_unbind_channel_params tsg_bind_unbind_channel; |
494 | struct tegra_vgpu_tsg_open_params tsg_open; | ||
489 | struct tegra_vgpu_tsg_preempt_params tsg_preempt; | 495 | struct tegra_vgpu_tsg_preempt_params tsg_preempt; |
490 | struct tegra_vgpu_tsg_timeslice_params tsg_timeslice; | 496 | struct tegra_vgpu_tsg_timeslice_params tsg_timeslice; |
491 | struct tegra_vgpu_tsg_runlist_interleave_params tsg_interleave; | 497 | struct tegra_vgpu_tsg_runlist_interleave_params tsg_interleave; |