diff options
-rw-r--r-- | drivers/gpu/nvgpu/gp10b/hw_fifo_gp10b.h | 6 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gp10b/hw_gmmu_gp10b.h | 2 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gp10b/hw_gr_gp10b.h | 64 |
3 files changed, 48 insertions, 24 deletions
diff --git a/drivers/gpu/nvgpu/gp10b/hw_fifo_gp10b.h b/drivers/gpu/nvgpu/gp10b/hw_fifo_gp10b.h index 6f7e09ff..34977523 100644 --- a/drivers/gpu/nvgpu/gp10b/hw_fifo_gp10b.h +++ b/drivers/gpu/nvgpu/gp10b/hw_fifo_gp10b.h | |||
@@ -1,5 +1,5 @@ | |||
1 | /* | 1 | /* |
2 | * Copyright (c) 2014-2015, NVIDIA CORPORATION. All rights reserved. | 2 | * Copyright (c) 2014-2016, NVIDIA CORPORATION. All rights reserved. |
3 | * | 3 | * |
4 | * This program is free software; you can redistribute it and/or modify it | 4 | * This program is free software; you can redistribute it and/or modify it |
5 | * under the terms and conditions of the GNU General Public License, | 5 | * under the terms and conditions of the GNU General Public License, |
@@ -110,6 +110,10 @@ static inline u32 fifo_eng_runlist_length_f(u32 v) | |||
110 | { | 110 | { |
111 | return (v & 0xffff) << 0; | 111 | return (v & 0xffff) << 0; |
112 | } | 112 | } |
113 | static inline u32 fifo_eng_runlist_length_max_v(void) | ||
114 | { | ||
115 | return 0x0000ffff; | ||
116 | } | ||
113 | static inline u32 fifo_eng_runlist_pending_true_f(void) | 117 | static inline u32 fifo_eng_runlist_pending_true_f(void) |
114 | { | 118 | { |
115 | return 0x100000; | 119 | return 0x100000; |
diff --git a/drivers/gpu/nvgpu/gp10b/hw_gmmu_gp10b.h b/drivers/gpu/nvgpu/gp10b/hw_gmmu_gp10b.h index 9ce9448e..30e4307d 100644 --- a/drivers/gpu/nvgpu/gp10b/hw_gmmu_gp10b.h +++ b/drivers/gpu/nvgpu/gp10b/hw_gmmu_gp10b.h | |||
@@ -1,5 +1,5 @@ | |||
1 | /* | 1 | /* |
2 | * Copyright (c) 2014-2015, NVIDIA CORPORATION. All rights reserved. | 2 | * Copyright (c) 2014-2016, NVIDIA CORPORATION. All rights reserved. |
3 | * | 3 | * |
4 | * This program is free software; you can redistribute it and/or modify it | 4 | * This program is free software; you can redistribute it and/or modify it |
5 | * under the terms and conditions of the GNU General Public License, | 5 | * under the terms and conditions of the GNU General Public License, |
diff --git a/drivers/gpu/nvgpu/gp10b/hw_gr_gp10b.h b/drivers/gpu/nvgpu/gp10b/hw_gr_gp10b.h index b3fd704b..78792f50 100644 --- a/drivers/gpu/nvgpu/gp10b/hw_gr_gp10b.h +++ b/drivers/gpu/nvgpu/gp10b/hw_gr_gp10b.h | |||
@@ -1114,6 +1114,10 @@ static inline u32 gr_fecs_host_int_status_r(void) | |||
1114 | { | 1114 | { |
1115 | return 0x00409c18; | 1115 | return 0x00409c18; |
1116 | } | 1116 | } |
1117 | static inline u32 gr_fecs_host_int_status_fault_during_ctxsw_f(u32 v) | ||
1118 | { | ||
1119 | return (v & 0x1) << 16; | ||
1120 | } | ||
1117 | static inline u32 gr_fecs_host_int_status_umimp_firmware_method_f(u32 v) | 1121 | static inline u32 gr_fecs_host_int_status_umimp_firmware_method_f(u32 v) |
1118 | { | 1122 | { |
1119 | return (v & 0x1) << 17; | 1123 | return (v & 0x1) << 17; |
@@ -3462,6 +3466,10 @@ static inline u32 gr_gpc0_tpc0_sm_dbgr_control0_r(void) | |||
3462 | { | 3466 | { |
3463 | return 0x00504610; | 3467 | return 0x00504610; |
3464 | } | 3468 | } |
3469 | static inline u32 gr_gpc0_tpc0_sm_dbgr_control0_debugger_mode_m(void) | ||
3470 | { | ||
3471 | return 0x1 << 0; | ||
3472 | } | ||
3465 | static inline u32 gr_gpc0_tpc0_sm_dbgr_control0_debugger_mode_v(u32 r) | 3473 | static inline u32 gr_gpc0_tpc0_sm_dbgr_control0_debugger_mode_v(u32 r) |
3466 | { | 3474 | { |
3467 | return (r >> 0) & 0x1; | 3475 | return (r >> 0) & 0x1; |
@@ -3494,6 +3502,10 @@ static inline u32 gr_gpc0_tpc0_sm_dbgr_control0_run_trigger_task_f(void) | |||
3494 | { | 3502 | { |
3495 | return 0x40000000; | 3503 | return 0x40000000; |
3496 | } | 3504 | } |
3505 | static inline u32 gr_gpc0_tpc0_sm_dbgr_control0_stop_on_any_warp_m(void) | ||
3506 | { | ||
3507 | return 0x1 << 1; | ||
3508 | } | ||
3497 | static inline u32 gr_gpc0_tpc0_sm_dbgr_control0_stop_on_any_warp_v(u32 r) | 3509 | static inline u32 gr_gpc0_tpc0_sm_dbgr_control0_stop_on_any_warp_v(u32 r) |
3498 | { | 3510 | { |
3499 | return (r >> 1) & 0x1; | 3511 | return (r >> 1) & 0x1; |
@@ -3502,6 +3514,10 @@ static inline u32 gr_gpc0_tpc0_sm_dbgr_control0_stop_on_any_warp_disable_f(void) | |||
3502 | { | 3514 | { |
3503 | return 0x0; | 3515 | return 0x0; |
3504 | } | 3516 | } |
3517 | static inline u32 gr_gpc0_tpc0_sm_dbgr_control0_stop_on_any_sm_m(void) | ||
3518 | { | ||
3519 | return 0x1 << 2; | ||
3520 | } | ||
3505 | static inline u32 gr_gpc0_tpc0_sm_dbgr_control0_stop_on_any_sm_v(u32 r) | 3521 | static inline u32 gr_gpc0_tpc0_sm_dbgr_control0_stop_on_any_sm_v(u32 r) |
3506 | { | 3522 | { |
3507 | return (r >> 2) & 0x1; | 3523 | return (r >> 2) & 0x1; |
@@ -3510,6 +3526,14 @@ static inline u32 gr_gpc0_tpc0_sm_dbgr_control0_stop_on_any_sm_disable_f(void) | |||
3510 | { | 3526 | { |
3511 | return 0x0; | 3527 | return 0x0; |
3512 | } | 3528 | } |
3529 | static inline u32 gr_gpc0_tpc0_sm_dbgr_control0_stop_on_any_sm_stop_on_any_warp_disable_v(void) | ||
3530 | { | ||
3531 | return 0x00000000; | ||
3532 | } | ||
3533 | static inline u32 gr_gpc0_tpc0_sm_dbgr_control0_stop_on_any_sm_stop_on_any_sm_disable_v(void) | ||
3534 | { | ||
3535 | return 0x00000000; | ||
3536 | } | ||
3513 | static inline u32 gr_gpc0_tpc0_sm_warp_valid_mask_r(void) | 3537 | static inline u32 gr_gpc0_tpc0_sm_warp_valid_mask_r(void) |
3514 | { | 3538 | { |
3515 | return 0x00504614; | 3539 | return 0x00504614; |
@@ -3522,13 +3546,9 @@ static inline u32 gr_gpc0_tpc0_sm_dbgr_bpt_trap_mask_r(void) | |||
3522 | { | 3546 | { |
3523 | return 0x00504634; | 3547 | return 0x00504634; |
3524 | } | 3548 | } |
3525 | static inline u32 gr_gpc0_tpc0_sm_dbgr_bpt_trap_mask_stop_on_any_warp_disable_v(void) | 3549 | static inline u32 gr_gpcs_tpcs_sm_dbgr_bpt_pause_mask_r(void) |
3526 | { | 3550 | { |
3527 | return 0x00000000; | 3551 | return 0x00419e24; |
3528 | } | ||
3529 | static inline u32 gr_gpc0_tpc0_sm_dbgr_bpt_trap_mask_stop_on_any_sm_disable_v(void) | ||
3530 | { | ||
3531 | return 0x00000000; | ||
3532 | } | 3552 | } |
3533 | static inline u32 gr_gpc0_tpc0_sm_dbgr_status0_r(void) | 3553 | static inline u32 gr_gpc0_tpc0_sm_dbgr_status0_r(void) |
3534 | { | 3554 | { |
@@ -3606,22 +3626,6 @@ static inline u32 gr_gpc0_tpc0_sm_hww_global_esr_single_step_complete_pending_f( | |||
3606 | { | 3626 | { |
3607 | return 0x40; | 3627 | return 0x40; |
3608 | } | 3628 | } |
3609 | static inline u32 gr_gpc0_tpc0_tex_m_hww_esr_r(void) | ||
3610 | { | ||
3611 | return 0x00504224; | ||
3612 | } | ||
3613 | static inline u32 gr_gpc0_tpc0_tex_m_hww_esr_intr_pending_f(void) | ||
3614 | { | ||
3615 | return 0x1; | ||
3616 | } | ||
3617 | static inline u32 gr_gpc0_tpc0_tex_m_hww_esr_ecc_sec_pending_f(void) | ||
3618 | { | ||
3619 | return 0x80; | ||
3620 | } | ||
3621 | static inline u32 gr_gpc0_tpc0_tex_m_hww_esr_ecc_ded_pending_f(void) | ||
3622 | { | ||
3623 | return 0x100; | ||
3624 | } | ||
3625 | static inline u32 gr_gpc0_tpc0_sm_hww_global_esr_sm_to_sm_fault_pending_f(void) | 3629 | static inline u32 gr_gpc0_tpc0_sm_hww_global_esr_sm_to_sm_fault_pending_f(void) |
3626 | { | 3630 | { |
3627 | return 0x1; | 3631 | return 0x1; |
@@ -3642,6 +3646,22 @@ static inline u32 gr_gpc0_tpc0_sm_hww_global_esr_timeout_error_pending_f(void) | |||
3642 | { | 3646 | { |
3643 | return 0x80000000; | 3647 | return 0x80000000; |
3644 | } | 3648 | } |
3649 | static inline u32 gr_gpc0_tpc0_tex_m_hww_esr_r(void) | ||
3650 | { | ||
3651 | return 0x00504224; | ||
3652 | } | ||
3653 | static inline u32 gr_gpc0_tpc0_tex_m_hww_esr_intr_pending_f(void) | ||
3654 | { | ||
3655 | return 0x1; | ||
3656 | } | ||
3657 | static inline u32 gr_gpc0_tpc0_tex_m_hww_esr_ecc_sec_pending_f(void) | ||
3658 | { | ||
3659 | return 0x80; | ||
3660 | } | ||
3661 | static inline u32 gr_gpc0_tpc0_tex_m_hww_esr_ecc_ded_pending_f(void) | ||
3662 | { | ||
3663 | return 0x100; | ||
3664 | } | ||
3645 | static inline u32 gr_gpc0_tpc0_sm_hww_warp_esr_r(void) | 3665 | static inline u32 gr_gpc0_tpc0_sm_hww_warp_esr_r(void) |
3646 | { | 3666 | { |
3647 | return 0x00504648; | 3667 | return 0x00504648; |