3 files changed, 9 insertions, 9 deletions

diff --git a/drivers/gpu/nvgpu/common/linux/io.c b/drivers/gpu/nvgpu/common/linux/io.c
index 04a9fbe8..729825e7 100644
--- a/drivers/gpu/nvgpu/common/linux/io.c
+++ b/drivers/gpu/nvgpu/common/linux/io.c
@@ -26,7 +26,7 @@ void nvgpu_writel(struct gk20a *g, u32 r, u32 v)
                 gk20a_dbg(gpu_dbg_reg, "r=0x%x v=0x%x (failed)", r, v);
         } else {
                 writel_relaxed(v, l->regs + r);
-                nvgpu_smp_wmb();
+                nvgpu_wmb();
                 gk20a_dbg(gpu_dbg_reg, "r=0x%x v=0x%x", r, v);
         }
 }
@@ -57,7 +57,7 @@ void nvgpu_writel_check(struct gk20a *g, u32 r, u32 v)
                 __gk20a_warn_on_no_regs();
                 gk20a_dbg(gpu_dbg_reg, "r=0x%x v=0x%x (failed)", r, v);
         } else {
-                nvgpu_smp_wmb();
+                nvgpu_wmb();
                 do {
                         writel_relaxed(v, l->regs + r);
                 } while (readl(l->regs + r) != v);
@@ -73,7 +73,7 @@ void nvgpu_bar1_writel(struct gk20a *g, u32 b, u32 v)
                 __gk20a_warn_on_no_regs();
                 gk20a_dbg(gpu_dbg_reg, "b=0x%x v=0x%x (failed)", b, v);
         } else {
-                nvgpu_smp_wmb();
+                nvgpu_wmb();
                 writel_relaxed(v, l->bar1 + b);
                 gk20a_dbg(gpu_dbg_reg, "b=0x%x v=0x%x", b, v);
         }
diff --git a/drivers/gpu/nvgpu/common/mm/gmmu.c b/drivers/gpu/nvgpu/common/mm/gmmu.c
index 6cca8c2f..8ad7dac7 100644
--- a/drivers/gpu/nvgpu/common/mm/gmmu.c
+++ b/drivers/gpu/nvgpu/common/mm/gmmu.c
@@ -180,7 +180,7 @@ int nvgpu_gmmu_init_page_table(struct vm_gk20a *vm)
                 return err;
 
         /*
-         * One nvgpu_smp_mb() is done after all mapping operations. Don't need
+         * One nvgpu_mb() is done after all mapping operations. Don't need
          * individual barriers for each PD write.
          */
         vm->pdb.mem->skip_wmb = true;
@@ -275,7 +275,7 @@ static int pd_allocate(struct vm_gk20a *vm,
         }
 
         /*
-         * One nvgpu_smp_mb() is done after all mapping operations. Don't need
+         * One nvgpu_mb() is done after all mapping operations. Don't need
          * individual barriers for each PD write.
          */
         pd->mem->skip_wmb = true;
@@ -639,7 +639,7 @@ static int __nvgpu_gmmu_update_page_table(struct vm_gk20a *vm,
                                                 attrs);
 
         unmap_gmmu_pages(g, &vm->pdb);
-        nvgpu_smp_mb();
+        nvgpu_mb();
 
         __gmmu_dbg(g, attrs, "%-5s Done!", sgt ? "MAP" : "UNMAP");
 
@@ -914,7 +914,7 @@ int __nvgpu_set_pte(struct gk20a *g, struct vm_gk20a *vm, u64 vaddr, u32 *pte)
          * There probably also needs to be a TLB invalidate as well but we leave
          * that to the caller of this function.
          */
-        nvgpu_smp_wmb();
+        nvgpu_wmb();
 
         return 0;
 }
diff --git a/drivers/gpu/nvgpu/gv11b/fifo_gv11b.c b/drivers/gpu/nvgpu/gv11b/fifo_gv11b.c
index f87c6dea..0238ae6c 100644
--- a/drivers/gpu/nvgpu/gv11b/fifo_gv11b.c
+++ b/drivers/gpu/nvgpu/gv11b/fifo_gv11b.c
@@ -253,8 +253,8 @@ void gv11b_userd_gp_put(struct gk20a *g, struct channel_gk20a *c)
 
         nvgpu_mem_wr32(g, userd_mem, offset + ram_userd_gp_put_w(),
                                                         c->gpfifo.put);
-        /* commit everything to cpu */
-        nvgpu_smp_mb();
+        /* Commit everything to GPU. */
+        nvgpu_mb();
 
         gv11b_ring_channel_doorbell(c);
 }