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-rw-r--r--drivers/gpu/nvgpu/gk20a/gr_gk20a.c25
-rw-r--r--drivers/gpu/nvgpu/gk20a/gr_gk20a.h4
-rw-r--r--drivers/gpu/nvgpu/gk20a/hw_ctxsw_prog_gk20a.h4
-rw-r--r--drivers/gpu/nvgpu/gm20b/hw_ctxsw_prog_gm20b.h4
4 files changed, 37 insertions, 0 deletions
diff --git a/drivers/gpu/nvgpu/gk20a/gr_gk20a.c b/drivers/gpu/nvgpu/gk20a/gr_gk20a.c
index 7f02dc43..bfb11566 100644
--- a/drivers/gpu/nvgpu/gk20a/gr_gk20a.c
+++ b/drivers/gpu/nvgpu/gk20a/gr_gk20a.c
@@ -86,6 +86,31 @@ static int gr_gk20a_init_golden_ctx_image(struct gk20a *g,
86/*elcg init */ 86/*elcg init */
87static void gr_gk20a_enable_elcg(struct gk20a *g); 87static void gr_gk20a_enable_elcg(struct gk20a *g);
88 88
89int gr_gk20a_get_ctx_id(struct gk20a *g,
90 struct channel_gk20a *c,
91 u32 *ctx_id)
92{
93 struct channel_ctx_gk20a *ch_ctx = &c->ch_ctx;
94 void *ctx_ptr = NULL;
95
96 /* Channel gr_ctx buffer is gpu cacheable.
97 Flush and invalidate before cpu update. */
98 g->ops.mm.l2_flush(g, true);
99
100 ctx_ptr = vmap(ch_ctx->gr_ctx->mem.pages,
101 PAGE_ALIGN(ch_ctx->gr_ctx->mem.size) >> PAGE_SHIFT,
102 0, pgprot_writecombine(PAGE_KERNEL));
103 if (!ctx_ptr)
104 return -ENOMEM;
105
106 *ctx_id = gk20a_mem_rd32(ctx_ptr +
107 ctxsw_prog_main_image_context_id_o(), 0);
108
109 vunmap(ctx_ptr);
110
111 return 0;
112}
113
89void gk20a_fecs_dump_falcon_stats(struct gk20a *g) 114void gk20a_fecs_dump_falcon_stats(struct gk20a *g)
90{ 115{
91 int i; 116 int i;
diff --git a/drivers/gpu/nvgpu/gk20a/gr_gk20a.h b/drivers/gpu/nvgpu/gk20a/gr_gk20a.h
index 29c2dcf6..74da0cf1 100644
--- a/drivers/gpu/nvgpu/gk20a/gr_gk20a.h
+++ b/drivers/gpu/nvgpu/gk20a/gr_gk20a.h
@@ -562,4 +562,8 @@ int gr_gk20a_ctx_wait_ucode(struct gk20a *g, u32 mailbox_id,
562 u32 mailbox_ok, u32 opc_fail, 562 u32 mailbox_ok, u32 opc_fail,
563 u32 mailbox_fail, bool sleepduringwait); 563 u32 mailbox_fail, bool sleepduringwait);
564 564
565int gr_gk20a_get_ctx_id(struct gk20a *g,
566 struct channel_gk20a *c,
567 u32 *ctx_id);
568
565#endif /*__GR_GK20A_H__*/ 569#endif /*__GR_GK20A_H__*/
diff --git a/drivers/gpu/nvgpu/gk20a/hw_ctxsw_prog_gk20a.h b/drivers/gpu/nvgpu/gk20a/hw_ctxsw_prog_gk20a.h
index 4e3fae13..39cbbb58 100644
--- a/drivers/gpu/nvgpu/gk20a/hw_ctxsw_prog_gk20a.h
+++ b/drivers/gpu/nvgpu/gk20a/hw_ctxsw_prog_gk20a.h
@@ -242,4 +242,8 @@ static inline u32 ctxsw_prog_main_image_misc_options_verif_features_disabled_f(v
242{ 242{
243 return 0x0; 243 return 0x0;
244} 244}
245static inline u32 ctxsw_prog_main_image_context_id_o(void)
246{
247 return 0x000000f0;
248}
245#endif 249#endif
diff --git a/drivers/gpu/nvgpu/gm20b/hw_ctxsw_prog_gm20b.h b/drivers/gpu/nvgpu/gm20b/hw_ctxsw_prog_gm20b.h
index 34f8a6a4..d01667bc 100644
--- a/drivers/gpu/nvgpu/gm20b/hw_ctxsw_prog_gm20b.h
+++ b/drivers/gpu/nvgpu/gm20b/hw_ctxsw_prog_gm20b.h
@@ -270,4 +270,8 @@ static inline u32 ctxsw_prog_main_image_preemption_options_control_cta_enabled_f
270{ 270{
271 return 0x1; 271 return 0x1;
272} 272}
273static inline u32 ctxsw_prog_main_image_context_id_o(void)
274{
275 return 0x000000f0;
276}
273#endif 277#endif