diff options
-rw-r--r-- | drivers/gpu/nvgpu/vgpu/fifo_vgpu.c | 26 | ||||
-rw-r--r-- | include/linux/tegra_vgpu.h | 8 |
2 files changed, 32 insertions, 2 deletions
diff --git a/drivers/gpu/nvgpu/vgpu/fifo_vgpu.c b/drivers/gpu/nvgpu/vgpu/fifo_vgpu.c index fb19db4a..0895b757 100644 --- a/drivers/gpu/nvgpu/vgpu/fifo_vgpu.c +++ b/drivers/gpu/nvgpu/vgpu/fifo_vgpu.c | |||
@@ -560,6 +560,28 @@ static int vgpu_channel_set_priority(struct channel_gk20a *ch, u32 priority) | |||
560 | return err ? err : msg.ret; | 560 | return err ? err : msg.ret; |
561 | } | 561 | } |
562 | 562 | ||
563 | static int vgpu_fifo_tsg_set_runlist_interleave(struct gk20a *g, | ||
564 | u32 tsgid, | ||
565 | u32 runlist_id, | ||
566 | u32 new_level) | ||
567 | { | ||
568 | struct gk20a_platform *platform = gk20a_get_platform(g->dev); | ||
569 | struct tegra_vgpu_cmd_msg msg = {0}; | ||
570 | struct tegra_vgpu_tsg_runlist_interleave_params *p = | ||
571 | &msg.params.tsg_interleave; | ||
572 | int err; | ||
573 | |||
574 | gk20a_dbg_fn(""); | ||
575 | |||
576 | msg.cmd = TEGRA_VGPU_CMD_TSG_SET_RUNLIST_INTERLEAVE; | ||
577 | msg.handle = platform->virt_handle; | ||
578 | p->tsg_id = tsgid; | ||
579 | p->level = new_level; | ||
580 | err = vgpu_comm_sendrecv(&msg, sizeof(msg), sizeof(msg)); | ||
581 | WARN_ON(err || msg.ret); | ||
582 | return err ? err : msg.ret; | ||
583 | } | ||
584 | |||
563 | static int vgpu_fifo_set_runlist_interleave(struct gk20a *g, | 585 | static int vgpu_fifo_set_runlist_interleave(struct gk20a *g, |
564 | u32 id, | 586 | u32 id, |
565 | bool is_tsg, | 587 | bool is_tsg, |
@@ -575,9 +597,9 @@ static int vgpu_fifo_set_runlist_interleave(struct gk20a *g, | |||
575 | 597 | ||
576 | gk20a_dbg_fn(""); | 598 | gk20a_dbg_fn(""); |
577 | 599 | ||
578 | /* FIXME: add support for TSGs */ | ||
579 | if (is_tsg) | 600 | if (is_tsg) |
580 | return -ENOSYS; | 601 | return vgpu_fifo_tsg_set_runlist_interleave(g, id, |
602 | runlist_id, new_level); | ||
581 | 603 | ||
582 | ch = &g->fifo.channel[id]; | 604 | ch = &g->fifo.channel[id]; |
583 | msg.cmd = TEGRA_VGPU_CMD_CHANNEL_SET_RUNLIST_INTERLEAVE; | 605 | msg.cmd = TEGRA_VGPU_CMD_CHANNEL_SET_RUNLIST_INTERLEAVE; |
diff --git a/include/linux/tegra_vgpu.h b/include/linux/tegra_vgpu.h index 706d87e4..9547e35b 100644 --- a/include/linux/tegra_vgpu.h +++ b/include/linux/tegra_vgpu.h | |||
@@ -92,6 +92,7 @@ enum { | |||
92 | TEGRA_VGPU_CMD_TSG_UNBIND_CHANNEL, | 92 | TEGRA_VGPU_CMD_TSG_UNBIND_CHANNEL, |
93 | TEGRA_VGPU_CMD_TSG_PREEMPT, | 93 | TEGRA_VGPU_CMD_TSG_PREEMPT, |
94 | TEGRA_VGPU_CMD_TSG_SET_TIMESLICE, | 94 | TEGRA_VGPU_CMD_TSG_SET_TIMESLICE, |
95 | TEGRA_VGPU_CMD_TSG_SET_RUNLIST_INTERLEAVE, | ||
95 | }; | 96 | }; |
96 | 97 | ||
97 | struct tegra_vgpu_connect_params { | 98 | struct tegra_vgpu_connect_params { |
@@ -379,6 +380,12 @@ struct tegra_vgpu_tsg_timeslice_params { | |||
379 | u32 timeslice_us; | 380 | u32 timeslice_us; |
380 | }; | 381 | }; |
381 | 382 | ||
383 | /* level follows nvgpu.h definitions */ | ||
384 | struct tegra_vgpu_tsg_runlist_interleave_params { | ||
385 | u32 tsg_id; | ||
386 | u32 level; | ||
387 | }; | ||
388 | |||
382 | struct tegra_vgpu_cmd_msg { | 389 | struct tegra_vgpu_cmd_msg { |
383 | u32 cmd; | 390 | u32 cmd; |
384 | int ret; | 391 | int ret; |
@@ -418,6 +425,7 @@ struct tegra_vgpu_cmd_msg { | |||
418 | struct tegra_vgpu_tsg_bind_unbind_channel_params tsg_bind_unbind_channel; | 425 | struct tegra_vgpu_tsg_bind_unbind_channel_params tsg_bind_unbind_channel; |
419 | struct tegra_vgpu_tsg_preempt_params tsg_preempt; | 426 | struct tegra_vgpu_tsg_preempt_params tsg_preempt; |
420 | struct tegra_vgpu_tsg_timeslice_params tsg_timeslice; | 427 | struct tegra_vgpu_tsg_timeslice_params tsg_timeslice; |
428 | struct tegra_vgpu_tsg_runlist_interleave_params tsg_interleave; | ||
421 | char padding[192]; | 429 | char padding[192]; |
422 | } params; | 430 | } params; |
423 | }; | 431 | }; |