diff options
-rw-r--r-- | drivers/gpu/nvgpu/common/pmu/pmu.c | 3 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/fifo_gk20a.c | 12 |
2 files changed, 10 insertions, 5 deletions
diff --git a/drivers/gpu/nvgpu/common/pmu/pmu.c b/drivers/gpu/nvgpu/common/pmu/pmu.c index 1a9061e8..f0df6e14 100644 --- a/drivers/gpu/nvgpu/common/pmu/pmu.c +++ b/drivers/gpu/nvgpu/common/pmu/pmu.c | |||
@@ -499,7 +499,8 @@ int nvgpu_pmu_destroy(struct gk20a *g) | |||
499 | nvgpu_pmu_get_pg_stats(g, | 499 | nvgpu_pmu_get_pg_stats(g, |
500 | PMU_PG_ELPG_ENGINE_ID_GRAPHICS, &pg_stat_data); | 500 | PMU_PG_ELPG_ENGINE_ID_GRAPHICS, &pg_stat_data); |
501 | 501 | ||
502 | nvgpu_pmu_disable_elpg(g); | 502 | if (nvgpu_pmu_disable_elpg(g)) |
503 | nvgpu_err(g, "failed to set disable elpg"); | ||
503 | pmu->initialized = false; | 504 | pmu->initialized = false; |
504 | 505 | ||
505 | /* update the s/w ELPG residency counters */ | 506 | /* update the s/w ELPG residency counters */ |
diff --git a/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c b/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c index ed8e98b9..7fc773f8 100644 --- a/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c +++ b/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c | |||
@@ -1209,8 +1209,10 @@ void gk20a_fifo_reset_engine(struct gk20a *g, u32 engine_id) | |||
1209 | nvgpu_err(g, "unsupported engine_id %d", engine_id); | 1209 | nvgpu_err(g, "unsupported engine_id %d", engine_id); |
1210 | 1210 | ||
1211 | if (engine_enum == ENGINE_GR_GK20A) { | 1211 | if (engine_enum == ENGINE_GR_GK20A) { |
1212 | if (g->support_pmu && g->can_elpg) | 1212 | if (g->support_pmu && g->can_elpg) { |
1213 | nvgpu_pmu_disable_elpg(g); | 1213 | if (nvgpu_pmu_disable_elpg(g)) |
1214 | nvgpu_err(g, "failed to set disable elpg"); | ||
1215 | } | ||
1214 | /* resetting engine will alter read/write index. | 1216 | /* resetting engine will alter read/write index. |
1215 | * need to flush circular buffer before re-enabling FECS. | 1217 | * need to flush circular buffer before re-enabling FECS. |
1216 | */ | 1218 | */ |
@@ -1457,8 +1459,10 @@ static bool gk20a_fifo_handle_mmu_fault( | |||
1457 | g->fifo.deferred_reset_pending = false; | 1459 | g->fifo.deferred_reset_pending = false; |
1458 | 1460 | ||
1459 | /* Disable power management */ | 1461 | /* Disable power management */ |
1460 | if (g->support_pmu && g->can_elpg) | 1462 | if (g->support_pmu && g->can_elpg) { |
1461 | nvgpu_pmu_disable_elpg(g); | 1463 | if (nvgpu_pmu_disable_elpg(g)) |
1464 | nvgpu_err(g, "failed to set disable elpg"); | ||
1465 | } | ||
1462 | if (g->ops.clock_gating.slcg_gr_load_gating_prod) | 1466 | if (g->ops.clock_gating.slcg_gr_load_gating_prod) |
1463 | g->ops.clock_gating.slcg_gr_load_gating_prod(g, | 1467 | g->ops.clock_gating.slcg_gr_load_gating_prod(g, |
1464 | false); | 1468 | false); |