diff options
-rw-r--r-- | drivers/gpu/nvgpu/gp10b/mm_gp10b.c | 28 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gp10b/mm_gp10b.h | 3 |
2 files changed, 31 insertions, 0 deletions
diff --git a/drivers/gpu/nvgpu/gp10b/mm_gp10b.c b/drivers/gpu/nvgpu/gp10b/mm_gp10b.c index 9fde6147..c316aa9f 100644 --- a/drivers/gpu/nvgpu/gp10b/mm_gp10b.c +++ b/drivers/gpu/nvgpu/gp10b/mm_gp10b.c | |||
@@ -111,6 +111,33 @@ static int gb10b_init_bar2_mm_hw_setup(struct gk20a *g) | |||
111 | gk20a_dbg_fn("done"); | 111 | gk20a_dbg_fn("done"); |
112 | return 0; | 112 | return 0; |
113 | } | 113 | } |
114 | |||
115 | static u64 gp10b_mm_phys_addr_translate(struct gk20a *g, u64 phys_addr, | ||
116 | u32 flags) | ||
117 | { | ||
118 | if (!device_is_iommuable(dev_from_gk20a(g))) | ||
119 | if (flags & NVGPU_AS_MAP_BUFFER_FLAGS_IO_COHERENT) | ||
120 | return phys_addr | | ||
121 | 1ULL << NVGPU_MM_GET_IO_COHERENCE_BIT; | ||
122 | |||
123 | return phys_addr; | ||
124 | } | ||
125 | |||
126 | static u64 gp10b_mm_iova_addr(struct gk20a *g, struct scatterlist *sgl, | ||
127 | u32 flags) | ||
128 | { | ||
129 | if (!device_is_iommuable(dev_from_gk20a(g))) | ||
130 | return gp10b_mm_phys_addr_translate(g, sg_phys(sgl), flags); | ||
131 | |||
132 | if (sg_dma_address(sgl) == 0) | ||
133 | return gp10b_mm_phys_addr_translate(g, sg_phys(sgl), flags); | ||
134 | |||
135 | if (sg_dma_address(sgl) == DMA_ERROR_CODE) | ||
136 | return 0; | ||
137 | |||
138 | return gk20a_mm_smmu_vaddr_translate(g, sg_dma_address(sgl)); | ||
139 | } | ||
140 | |||
114 | void gp10b_init_mm(struct gpu_ops *gops) | 141 | void gp10b_init_mm(struct gpu_ops *gops) |
115 | { | 142 | { |
116 | gm20b_init_mm(gops); | 143 | gm20b_init_mm(gops); |
@@ -118,4 +145,5 @@ void gp10b_init_mm(struct gpu_ops *gops) | |||
118 | gops->mm.init_mm_setup_hw = gp10b_init_mm_setup_hw; | 145 | gops->mm.init_mm_setup_hw = gp10b_init_mm_setup_hw; |
119 | gops->mm.init_bar2_vm = gb10b_init_bar2_vm; | 146 | gops->mm.init_bar2_vm = gb10b_init_bar2_vm; |
120 | gops->mm.init_bar2_mm_hw_setup = gb10b_init_bar2_mm_hw_setup; | 147 | gops->mm.init_bar2_mm_hw_setup = gb10b_init_bar2_mm_hw_setup; |
148 | gops->mm.get_iova_addr = gp10b_mm_iova_addr; | ||
121 | } | 149 | } |
diff --git a/drivers/gpu/nvgpu/gp10b/mm_gp10b.h b/drivers/gpu/nvgpu/gp10b/mm_gp10b.h index 38ca93a4..034944e0 100644 --- a/drivers/gpu/nvgpu/gp10b/mm_gp10b.h +++ b/drivers/gpu/nvgpu/gp10b/mm_gp10b.h | |||
@@ -13,6 +13,9 @@ | |||
13 | 13 | ||
14 | #ifndef MM_GP10B_H | 14 | #ifndef MM_GP10B_H |
15 | #define MM_GP10B_H | 15 | #define MM_GP10B_H |
16 | |||
17 | #define NVGPU_MM_GET_IO_COHERENCE_BIT 35 | ||
18 | |||
16 | struct gpu_ops; | 19 | struct gpu_ops; |
17 | 20 | ||
18 | void gp10b_init_mm(struct gpu_ops *gops); | 21 | void gp10b_init_mm(struct gpu_ops *gops); |