diff options
-rw-r--r-- | drivers/gpu/nvgpu/gp106/hal_gp106.c | 17 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gp106/xve_gp106.c | 45 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gp106/xve_gp106.h | 15 |
3 files changed, 41 insertions, 36 deletions
diff --git a/drivers/gpu/nvgpu/gp106/hal_gp106.c b/drivers/gpu/nvgpu/gp106/hal_gp106.c index f31180cd..a13889ad 100644 --- a/drivers/gpu/nvgpu/gp106/hal_gp106.c +++ b/drivers/gpu/nvgpu/gp106/hal_gp106.c | |||
@@ -239,6 +239,21 @@ static const struct gpu_ops gp106_ops = { | |||
239 | .pg_gr_load_gating_prod = | 239 | .pg_gr_load_gating_prod = |
240 | gr_gp106_pg_gr_load_gating_prod, | 240 | gr_gp106_pg_gr_load_gating_prod, |
241 | }, | 241 | }, |
242 | .xve = { | ||
243 | .sw_init = xve_sw_init_gp106, | ||
244 | .get_speed = xve_get_speed_gp106, | ||
245 | .set_speed = xve_set_speed_gp106, | ||
246 | .available_speeds = xve_available_speeds_gp106, | ||
247 | .xve_readl = xve_xve_readl_gp106, | ||
248 | .xve_writel = xve_xve_writel_gp106, | ||
249 | .disable_aspm = xve_disable_aspm_gp106, | ||
250 | .reset_gpu = xve_reset_gpu_gp106, | ||
251 | #if defined(CONFIG_PCI_MSI) | ||
252 | .rearm_msi = xve_rearm_msi_gp106, | ||
253 | #endif | ||
254 | .enable_shadow_rom = xve_enable_shadow_rom_gp106, | ||
255 | .disable_shadow_rom = xve_disable_shadow_rom_gp106, | ||
256 | }, | ||
242 | .get_litter_value = gp106_get_litter_value, | 257 | .get_litter_value = gp106_get_litter_value, |
243 | .chip_init_gpu_characteristics = gp106_init_gpu_characteristics, | 258 | .chip_init_gpu_characteristics = gp106_init_gpu_characteristics, |
244 | .bios_init = gm206_bios_init, | 259 | .bios_init = gm206_bios_init, |
@@ -253,6 +268,7 @@ int gp106_init_hal(struct gk20a *g) | |||
253 | 268 | ||
254 | gops->ltc = gp106_ops.ltc; | 269 | gops->ltc = gp106_ops.ltc; |
255 | gops->clock_gating = gp106_ops.clock_gating; | 270 | gops->clock_gating = gp106_ops.clock_gating; |
271 | gops->xve = gp106_ops.xve; | ||
256 | 272 | ||
257 | /* Lone functions */ | 273 | /* Lone functions */ |
258 | gops->get_litter_value = gp106_ops.get_litter_value; | 274 | gops->get_litter_value = gp106_ops.get_litter_value; |
@@ -287,7 +303,6 @@ int gp106_init_hal(struct gk20a *g) | |||
287 | gk20a_init_css_ops(gops); | 303 | gk20a_init_css_ops(gops); |
288 | #endif | 304 | #endif |
289 | gp106_init_therm_ops(gops); | 305 | gp106_init_therm_ops(gops); |
290 | gp106_init_xve_ops(gops); | ||
291 | 306 | ||
292 | g->name = "gp10x"; | 307 | g->name = "gp10x"; |
293 | gops->gr_ctx.use_dma_for_fw_bootstrap = true; | 308 | gops->gr_ctx.use_dma_for_fw_bootstrap = true; |
diff --git a/drivers/gpu/nvgpu/gp106/xve_gp106.c b/drivers/gpu/nvgpu/gp106/xve_gp106.c index bbf86e33..77641240 100644 --- a/drivers/gpu/nvgpu/gp106/xve_gp106.c +++ b/drivers/gpu/nvgpu/gp106/xve_gp106.c | |||
@@ -34,12 +34,12 @@ | |||
34 | 34 | ||
35 | #define NV_PCFG 0x88000 | 35 | #define NV_PCFG 0x88000 |
36 | 36 | ||
37 | static void xve_xve_writel_gp106(struct gk20a *g, u32 reg, u32 val) | 37 | void xve_xve_writel_gp106(struct gk20a *g, u32 reg, u32 val) |
38 | { | 38 | { |
39 | gk20a_writel(g, NV_PCFG + reg, val); | 39 | gk20a_writel(g, NV_PCFG + reg, val); |
40 | } | 40 | } |
41 | 41 | ||
42 | static u32 xve_xve_readl_gp106(struct gk20a *g, u32 reg) | 42 | u32 xve_xve_readl_gp106(struct gk20a *g, u32 reg) |
43 | { | 43 | { |
44 | return gk20a_readl(g, NV_PCFG + reg); | 44 | return gk20a_readl(g, NV_PCFG + reg); |
45 | } | 45 | } |
@@ -47,7 +47,7 @@ static u32 xve_xve_readl_gp106(struct gk20a *g, u32 reg) | |||
47 | /** | 47 | /** |
48 | * Resets the GPU (except the XVE/XP). | 48 | * Resets the GPU (except the XVE/XP). |
49 | */ | 49 | */ |
50 | static void xve_reset_gpu_gp106(struct gk20a *g) | 50 | void xve_reset_gpu_gp106(struct gk20a *g) |
51 | { | 51 | { |
52 | u32 reset; | 52 | u32 reset; |
53 | 53 | ||
@@ -89,7 +89,7 @@ static void xve_reset_gpu_gp106(struct gk20a *g) | |||
89 | * bus speed is detected then *@xve_link_speed is not touched and -ENODEV is | 89 | * bus speed is detected then *@xve_link_speed is not touched and -ENODEV is |
90 | * returned. | 90 | * returned. |
91 | */ | 91 | */ |
92 | static int xve_get_speed_gp106(struct gk20a *g, u32 *xve_link_speed) | 92 | int xve_get_speed_gp106(struct gk20a *g, u32 *xve_link_speed) |
93 | { | 93 | { |
94 | u32 status; | 94 | u32 status; |
95 | u32 link_speed, real_link_speed = 0; | 95 | u32 link_speed, real_link_speed = 0; |
@@ -161,7 +161,7 @@ static void set_xve_l1_mask(struct gk20a *g, int status) | |||
161 | /** | 161 | /** |
162 | * Disable ASPM permanently. | 162 | * Disable ASPM permanently. |
163 | */ | 163 | */ |
164 | static void xve_disable_aspm_gp106(struct gk20a *g) | 164 | void xve_disable_aspm_gp106(struct gk20a *g) |
165 | { | 165 | { |
166 | u32 xve_priv; | 166 | u32 xve_priv; |
167 | 167 | ||
@@ -450,7 +450,7 @@ done: | |||
450 | * | 450 | * |
451 | * If an error is encountered an appropriate error will be returned. | 451 | * If an error is encountered an appropriate error will be returned. |
452 | */ | 452 | */ |
453 | static int xve_set_speed_gp106(struct gk20a *g, u32 next_link_speed) | 453 | int xve_set_speed_gp106(struct gk20a *g, u32 next_link_speed) |
454 | { | 454 | { |
455 | u32 current_link_speed; | 455 | u32 current_link_speed; |
456 | int err; | 456 | int err; |
@@ -472,7 +472,7 @@ static int xve_set_speed_gp106(struct gk20a *g, u32 next_link_speed) | |||
472 | /** | 472 | /** |
473 | * Places a bitmask of available speeds for gp106 in @speed_mask. | 473 | * Places a bitmask of available speeds for gp106 in @speed_mask. |
474 | */ | 474 | */ |
475 | static void xve_available_speeds_gp106(struct gk20a *g, u32 *speed_mask) | 475 | void xve_available_speeds_gp106(struct gk20a *g, u32 *speed_mask) |
476 | { | 476 | { |
477 | *speed_mask = GPU_XVE_SPEED_2P5 | GPU_XVE_SPEED_5P0; | 477 | *speed_mask = GPU_XVE_SPEED_2P5 | GPU_XVE_SPEED_5P0; |
478 | } | 478 | } |
@@ -603,7 +603,7 @@ static const struct file_operations xve_link_control_status_fops = { | |||
603 | }; | 603 | }; |
604 | #endif | 604 | #endif |
605 | 605 | ||
606 | static int xve_sw_init_gp106(struct device *dev) | 606 | int xve_sw_init_gp106(struct device *dev) |
607 | { | 607 | { |
608 | int err = -ENODEV; | 608 | int err = -ENODEV; |
609 | #ifdef CONFIG_DEBUG_FS | 609 | #ifdef CONFIG_DEBUG_FS |
@@ -638,44 +638,21 @@ fail: | |||
638 | } | 638 | } |
639 | 639 | ||
640 | #if defined(CONFIG_PCI_MSI) | 640 | #if defined(CONFIG_PCI_MSI) |
641 | static void xve_rearm_msi_gp106(struct gk20a *g) | 641 | void xve_rearm_msi_gp106(struct gk20a *g) |
642 | { | 642 | { |
643 | /* We just need to write a dummy val in the CYA_2 offset */ | 643 | /* We just need to write a dummy val in the CYA_2 offset */ |
644 | g->ops.xve.xve_writel(g, xve_cya_2_r(), 0); | 644 | g->ops.xve.xve_writel(g, xve_cya_2_r(), 0); |
645 | } | 645 | } |
646 | #endif | 646 | #endif |
647 | 647 | ||
648 | static void xve_enable_shadow_rom_gp106(struct gk20a *g) | 648 | void xve_enable_shadow_rom_gp106(struct gk20a *g) |
649 | { | 649 | { |
650 | g->ops.xve.xve_writel(g, xve_rom_ctrl_r(), | 650 | g->ops.xve.xve_writel(g, xve_rom_ctrl_r(), |
651 | xve_rom_ctrl_rom_shadow_enabled_f()); | 651 | xve_rom_ctrl_rom_shadow_enabled_f()); |
652 | } | 652 | } |
653 | 653 | ||
654 | static void xve_disable_shadow_rom_gp106(struct gk20a *g) | 654 | void xve_disable_shadow_rom_gp106(struct gk20a *g) |
655 | { | 655 | { |
656 | g->ops.xve.xve_writel(g, xve_rom_ctrl_r(), | 656 | g->ops.xve.xve_writel(g, xve_rom_ctrl_r(), |
657 | xve_rom_ctrl_rom_shadow_disabled_f()); | 657 | xve_rom_ctrl_rom_shadow_disabled_f()); |
658 | } | 658 | } |
659 | |||
660 | /* | ||
661 | * Init the HAL functions and what not. xve_sw_init_gp106() is for initializing | ||
662 | * all the other stuff like debugfs nodes, etc. | ||
663 | */ | ||
664 | int gp106_init_xve_ops(struct gpu_ops *gops) | ||
665 | { | ||
666 | gops->xve.sw_init = xve_sw_init_gp106; | ||
667 | gops->xve.get_speed = xve_get_speed_gp106; | ||
668 | gops->xve.set_speed = xve_set_speed_gp106; | ||
669 | gops->xve.available_speeds = xve_available_speeds_gp106; | ||
670 | gops->xve.xve_readl = xve_xve_readl_gp106; | ||
671 | gops->xve.xve_writel = xve_xve_writel_gp106; | ||
672 | gops->xve.disable_aspm = xve_disable_aspm_gp106; | ||
673 | gops->xve.reset_gpu = xve_reset_gpu_gp106; | ||
674 | #if defined(CONFIG_PCI_MSI) | ||
675 | gops->xve.rearm_msi = xve_rearm_msi_gp106; | ||
676 | #endif | ||
677 | gops->xve.enable_shadow_rom = xve_enable_shadow_rom_gp106; | ||
678 | gops->xve.disable_shadow_rom = xve_disable_shadow_rom_gp106; | ||
679 | |||
680 | return 0; | ||
681 | } | ||
diff --git a/drivers/gpu/nvgpu/gp106/xve_gp106.h b/drivers/gpu/nvgpu/gp106/xve_gp106.h index 2dbc1891..31d3a125 100644 --- a/drivers/gpu/nvgpu/gp106/xve_gp106.h +++ b/drivers/gpu/nvgpu/gp106/xve_gp106.h | |||
@@ -1,5 +1,5 @@ | |||
1 | /* | 1 | /* |
2 | * Copyright (c) 2016, NVIDIA CORPORATION. All rights reserved. | 2 | * Copyright (c) 2016-2017, NVIDIA CORPORATION. All rights reserved. |
3 | * | 3 | * |
4 | * This program is free software; you can redistribute it and/or modify it | 4 | * This program is free software; you can redistribute it and/or modify it |
5 | * under the terms and conditions of the GNU General Public License, | 5 | * under the terms and conditions of the GNU General Public License, |
@@ -97,5 +97,18 @@ enum xv_speed_change_steps { | |||
97 | #define xv_sc_dbg(step, fmt, args...) \ | 97 | #define xv_sc_dbg(step, fmt, args...) \ |
98 | xv_dbg("[%d] %15s | " fmt, step, __stringify(step), ##args) | 98 | xv_dbg("[%d] %15s | " fmt, step, __stringify(step), ##args) |
99 | 99 | ||
100 | void xve_xve_writel_gp106(struct gk20a *g, u32 reg, u32 val); | ||
101 | u32 xve_xve_readl_gp106(struct gk20a *g, u32 reg); | ||
102 | void xve_reset_gpu_gp106(struct gk20a *g); | ||
103 | int xve_get_speed_gp106(struct gk20a *g, u32 *xve_link_speed); | ||
104 | void xve_disable_aspm_gp106(struct gk20a *g); | ||
105 | int xve_set_speed_gp106(struct gk20a *g, u32 next_link_speed); | ||
106 | void xve_available_speeds_gp106(struct gk20a *g, u32 *speed_mask); | ||
107 | int xve_sw_init_gp106(struct device *dev); | ||
108 | #if defined(CONFIG_PCI_MSI) | ||
109 | void xve_rearm_msi_gp106(struct gk20a *g); | ||
110 | #endif | ||
111 | void xve_enable_shadow_rom_gp106(struct gk20a *g); | ||
112 | void xve_disable_shadow_rom_gp106(struct gk20a *g); | ||
100 | 113 | ||
101 | #endif | 114 | #endif |