summaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
-rw-r--r--drivers/gpu/nvgpu/gm20b/hal_gm20b.c15
-rw-r--r--drivers/gpu/nvgpu/gp10b/gp10b_sysfs.h7
-rw-r--r--drivers/gpu/nvgpu/gp10b/gr_gp10b.c3
-rw-r--r--drivers/gpu/nvgpu/gp10b/hal_gp10b.c15
4 files changed, 12 insertions, 28 deletions
diff --git a/drivers/gpu/nvgpu/gm20b/hal_gm20b.c b/drivers/gpu/nvgpu/gm20b/hal_gm20b.c
index e036215f..d9fb2c53 100644
--- a/drivers/gpu/nvgpu/gm20b/hal_gm20b.c
+++ b/drivers/gpu/nvgpu/gm20b/hal_gm20b.c
@@ -14,8 +14,6 @@
14 */ 14 */
15 15
16#include <linux/types.h> 16#include <linux/types.h>
17#include <linux/version.h>
18#include <soc/tegra/fuse.h>
19 17
20#include "gk20a/gk20a.h" 18#include "gk20a/gk20a.h"
21#include "gk20a/dbg_gpu_gk20a.h" 19#include "gk20a/dbg_gpu_gk20a.h"
@@ -39,10 +37,7 @@
39#include "therm_gm20b.h" 37#include "therm_gm20b.h"
40 38
41#include <nvgpu/hw/gm20b/hw_proj_gm20b.h> 39#include <nvgpu/hw/gm20b/hw_proj_gm20b.h>
42 40#include <nvgpu/hw/gm20b/hw_fuse_gm20b.h>
43#if LINUX_VERSION_CODE < KERNEL_VERSION(4, 4, 0)
44#define FUSE_OPT_PRIV_SEC_DIS_0 0x264
45#endif
46 41
47#define PRIV_SECURITY_DISABLE 0x01 42#define PRIV_SECURITY_DISABLE 0x01
48 43
@@ -197,8 +192,8 @@ int gm20b_init_hal(struct gk20a *g)
197 if (platform->is_fmodel) { 192 if (platform->is_fmodel) {
198 gops->privsecurity = 1; 193 gops->privsecurity = 1;
199 } else { 194 } else {
200 tegra_fuse_readl(FUSE_OPT_PRIV_SEC_DIS_0, &val); 195 val = gk20a_readl(g, fuse_opt_priv_sec_en_r());
201 if (val & PRIV_SECURITY_DISABLE) { 196 if (!val) {
202 gk20a_dbg_info("priv security is disabled in HW"); 197 gk20a_dbg_info("priv security is disabled in HW");
203 gops->privsecurity = 0; 198 gops->privsecurity = 0;
204 } else { 199 } else {
@@ -210,8 +205,8 @@ int gm20b_init_hal(struct gk20a *g)
210 gk20a_dbg_info("running ASIM with PRIV security disabled"); 205 gk20a_dbg_info("running ASIM with PRIV security disabled");
211 gops->privsecurity = 0; 206 gops->privsecurity = 0;
212 } else { 207 } else {
213 tegra_fuse_readl(FUSE_OPT_PRIV_SEC_DIS_0, &val); 208 val = gk20a_readl(g, fuse_opt_priv_sec_en_r());
214 if (val & PRIV_SECURITY_DISABLE) { 209 if (!val) {
215 gops->privsecurity = 0; 210 gops->privsecurity = 0;
216 } else { 211 } else {
217 gk20a_dbg_info("priv security is not supported but enabled"); 212 gk20a_dbg_info("priv security is not supported but enabled");
diff --git a/drivers/gpu/nvgpu/gp10b/gp10b_sysfs.h b/drivers/gpu/nvgpu/gp10b/gp10b_sysfs.h
index 786a3bb0..f56ccfc7 100644
--- a/drivers/gpu/nvgpu/gp10b/gp10b_sysfs.h
+++ b/drivers/gpu/nvgpu/gp10b/gp10b_sysfs.h
@@ -16,13 +16,6 @@
16#ifndef _GP10B_SYSFS_H_ 16#ifndef _GP10B_SYSFS_H_
17#define _GP10B_SYSFS_H_ 17#define _GP10B_SYSFS_H_
18 18
19#include <linux/version.h>
20
21/*ECC Fuse*/
22#if LINUX_VERSION_CODE < KERNEL_VERSION(4, 4, 0)
23#define FUSE_OPT_ECC_EN 0x358
24#endif
25
26void gp10b_create_sysfs(struct device *dev); 19void gp10b_create_sysfs(struct device *dev);
27void gp10b_remove_sysfs(struct device *dev); 20void gp10b_remove_sysfs(struct device *dev);
28 21
diff --git a/drivers/gpu/nvgpu/gp10b/gr_gp10b.c b/drivers/gpu/nvgpu/gp10b/gr_gp10b.c
index d084d5dc..96919d2e 100644
--- a/drivers/gpu/nvgpu/gp10b/gr_gp10b.c
+++ b/drivers/gpu/nvgpu/gp10b/gr_gp10b.c
@@ -36,6 +36,7 @@
36#include <nvgpu/hw/gp10b/hw_fifo_gp10b.h> 36#include <nvgpu/hw/gp10b/hw_fifo_gp10b.h>
37#include <nvgpu/hw/gp10b/hw_ctxsw_prog_gp10b.h> 37#include <nvgpu/hw/gp10b/hw_ctxsw_prog_gp10b.h>
38#include <nvgpu/hw/gp10b/hw_mc_gp10b.h> 38#include <nvgpu/hw/gp10b/hw_mc_gp10b.h>
39#include <nvgpu/hw/gp10b/hw_fuse_gp10b.h>
39 40
40#define NVGPU_GFXP_WFI_TIMEOUT_US 100LL 41#define NVGPU_GFXP_WFI_TIMEOUT_US 100LL
41 42
@@ -1948,7 +1949,7 @@ static u32 get_ecc_override_val(struct gk20a *g)
1948{ 1949{
1949 u32 val; 1950 u32 val;
1950 1951
1951 tegra_fuse_readl(FUSE_OPT_ECC_EN, &val); 1952 val = gk20a_readl(g, fuse_opt_ecc_en_r());
1952 if (val) 1953 if (val)
1953 return gk20a_readl(g, gr_fecs_feature_override_ecc_r()); 1954 return gk20a_readl(g, gr_fecs_feature_override_ecc_r());
1954 1955
diff --git a/drivers/gpu/nvgpu/gp10b/hal_gp10b.c b/drivers/gpu/nvgpu/gp10b/hal_gp10b.c
index 5fa1ec85..b57fcb5f 100644
--- a/drivers/gpu/nvgpu/gp10b/hal_gp10b.c
+++ b/drivers/gpu/nvgpu/gp10b/hal_gp10b.c
@@ -17,7 +17,6 @@
17#include <linux/printk.h> 17#include <linux/printk.h>
18#include <linux/version.h> 18#include <linux/version.h>
19#include <linux/types.h> 19#include <linux/types.h>
20#include <soc/tegra/fuse.h>
21 20
22#include "gk20a/gk20a.h" 21#include "gk20a/gk20a.h"
23#include "gk20a/dbg_gpu_gk20a.h" 22#include "gk20a/dbg_gpu_gk20a.h"
@@ -46,11 +45,7 @@
46#include "gp10b.h" 45#include "gp10b.h"
47 46
48#include <nvgpu/hw/gp10b/hw_proj_gp10b.h> 47#include <nvgpu/hw/gp10b/hw_proj_gp10b.h>
49 48#include <nvgpu/hw/gp10b/hw_fuse_gp10b.h>
50#if LINUX_VERSION_CODE < KERNEL_VERSION(4, 4, 0)
51#define FUSE_OPT_PRIV_SEC_EN_0 0x264
52#endif
53#define PRIV_SECURITY_ENABLED 0x01
54 49
55static struct gpu_ops gp10b_ops = { 50static struct gpu_ops gp10b_ops = {
56 .clock_gating = { 51 .clock_gating = {
@@ -205,8 +200,8 @@ int gp10b_init_hal(struct gk20a *g)
205 gops->privsecurity = 0; 200 gops->privsecurity = 0;
206 gops->securegpccs = 0; 201 gops->securegpccs = 0;
207 } else { 202 } else {
208 tegra_fuse_readl(FUSE_OPT_PRIV_SEC_EN_0, &val); 203 val = gk20a_readl(g, fuse_opt_priv_sec_en_r());
209 if (val & PRIV_SECURITY_ENABLED) { 204 if (val) {
210 gops->privsecurity = 1; 205 gops->privsecurity = 1;
211 gops->securegpccs =1; 206 gops->securegpccs =1;
212 } else { 207 } else {
@@ -221,8 +216,8 @@ int gp10b_init_hal(struct gk20a *g)
221 gops->privsecurity = 0; 216 gops->privsecurity = 0;
222 gops->securegpccs = 0; 217 gops->securegpccs = 0;
223 } else { 218 } else {
224 tegra_fuse_readl(FUSE_OPT_PRIV_SEC_EN_0, &val); 219 val = gk20a_readl(g, fuse_opt_priv_sec_en_r());
225 if (val & PRIV_SECURITY_ENABLED) { 220 if (val) {
226 gk20a_dbg_info("priv security is not supported but enabled"); 221 gk20a_dbg_info("priv security is not supported but enabled");
227 gops->privsecurity = 1; 222 gops->privsecurity = 1;
228 gops->securegpccs =1; 223 gops->securegpccs =1;