diff options
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/ctrl_gk20a.c | 33 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/hw_fb_gk20a.h | 8 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/hw_gr_gk20a.h | 20 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gm20b/hw_fb_gm20b.h | 8 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gm20b/hw_gr_gm20b.h | 24 |
5 files changed, 81 insertions, 12 deletions
diff --git a/drivers/gpu/nvgpu/gk20a/ctrl_gk20a.c b/drivers/gpu/nvgpu/gk20a/ctrl_gk20a.c index 6dc92713..18567064 100644 --- a/drivers/gpu/nvgpu/gk20a/ctrl_gk20a.c +++ b/drivers/gpu/nvgpu/gk20a/ctrl_gk20a.c | |||
@@ -314,7 +314,7 @@ static int nvgpu_gpu_ioctl_set_mmu_debug_mode( | |||
314 | struct nvgpu_gpu_mmu_debug_mode_args *args) | 314 | struct nvgpu_gpu_mmu_debug_mode_args *args) |
315 | { | 315 | { |
316 | int err = 0; | 316 | int err = 0; |
317 | u32 mmu_debug_ctrl; | 317 | u32 reg_val, mmu_debug_ctrl; |
318 | 318 | ||
319 | err = gk20a_busy(g->dev); | 319 | err = gk20a_busy(g->dev); |
320 | if (err) { | 320 | if (err) { |
@@ -325,16 +325,17 @@ static int nvgpu_gpu_ioctl_set_mmu_debug_mode( | |||
325 | mutex_lock(&g->dbg_sessions_lock); | 325 | mutex_lock(&g->dbg_sessions_lock); |
326 | 326 | ||
327 | if (args->state == 1) { | 327 | if (args->state == 1) { |
328 | mmu_debug_ctrl = fb_mmu_debug_ctrl_debug_enabled_v(); | 328 | mmu_debug_ctrl = fb_mmu_debug_ctrl_debug_enabled_f(); |
329 | g->mmu_debug_ctrl = true; | 329 | g->mmu_debug_ctrl = true; |
330 | } else { | 330 | } else { |
331 | mmu_debug_ctrl = fb_mmu_debug_ctrl_debug_disabled_v(); | 331 | mmu_debug_ctrl = fb_mmu_debug_ctrl_debug_disabled_f(); |
332 | g->mmu_debug_ctrl = false; | 332 | g->mmu_debug_ctrl = false; |
333 | } | 333 | } |
334 | 334 | ||
335 | mmu_debug_ctrl = gk20a_readl(g, fb_mmu_debug_ctrl_r()); | 335 | reg_val = gk20a_readl(g, fb_mmu_debug_ctrl_r()); |
336 | mmu_debug_ctrl = set_field(mmu_debug_ctrl, fb_mmu_debug_ctrl_debug_m(), mmu_debug_ctrl); | 336 | reg_val = set_field(reg_val, |
337 | gk20a_writel(g, fb_mmu_debug_ctrl_r(), mmu_debug_ctrl); | 337 | fb_mmu_debug_ctrl_debug_m(), mmu_debug_ctrl); |
338 | gk20a_writel(g, fb_mmu_debug_ctrl_r(), reg_val); | ||
338 | 339 | ||
339 | mutex_unlock(&g->dbg_sessions_lock); | 340 | mutex_unlock(&g->dbg_sessions_lock); |
340 | gk20a_idle(g->dev); | 341 | gk20a_idle(g->dev); |
@@ -376,12 +377,20 @@ static int nvgpu_gpu_ioctl_set_debug_mode( | |||
376 | sm_dbgr_ctrl0 = ops.value_lo; | 377 | sm_dbgr_ctrl0 = ops.value_lo; |
377 | 378 | ||
378 | if (args->enable) { | 379 | if (args->enable) { |
379 | sm_dbgr_ctrl0 = gr_gpc0_tpc0_sm_dbgr_control0_debugger_mode_on_v() | | 380 | sm_dbgr_ctrl0 = set_field(sm_dbgr_ctrl0, |
380 | gr_gpc0_tpc0_sm_dbgr_control0_stop_on_any_warp_disable_f() | | 381 | gr_gpc0_tpc0_sm_dbgr_control0_debugger_mode_m(), |
381 | gr_gpc0_tpc0_sm_dbgr_control0_stop_on_any_sm_disable_f() | | 382 | gr_gpc0_tpc0_sm_dbgr_control0_debugger_mode_on_f()); |
382 | sm_dbgr_ctrl0; | 383 | sm_dbgr_ctrl0 = set_field(sm_dbgr_ctrl0, |
383 | } else | 384 | gr_gpc0_tpc0_sm_dbgr_control0_stop_on_any_warp_m(), |
384 | sm_dbgr_ctrl0 = gr_gpc0_tpc0_sm_dbgr_control0_debugger_mode_off_v() | sm_dbgr_ctrl0; | 385 | gr_gpc0_tpc0_sm_dbgr_control0_stop_on_any_warp_disable_f()); |
386 | sm_dbgr_ctrl0 = set_field(sm_dbgr_ctrl0, | ||
387 | gr_gpc0_tpc0_sm_dbgr_control0_stop_on_any_sm_m(), | ||
388 | gr_gpc0_tpc0_sm_dbgr_control0_stop_on_any_sm_disable_f()); | ||
389 | } else { | ||
390 | sm_dbgr_ctrl0 = set_field(sm_dbgr_ctrl0, | ||
391 | gr_gpc0_tpc0_sm_dbgr_control0_debugger_mode_m(), | ||
392 | gr_gpc0_tpc0_sm_dbgr_control0_debugger_mode_off_f()); | ||
393 | } | ||
385 | 394 | ||
386 | if (!err) { | 395 | if (!err) { |
387 | ops.op = REGOP(WRITE_32); | 396 | ops.op = REGOP(WRITE_32); |
diff --git a/drivers/gpu/nvgpu/gk20a/hw_fb_gk20a.h b/drivers/gpu/nvgpu/gk20a/hw_fb_gk20a.h index a0a3ae33..0234265a 100644 --- a/drivers/gpu/nvgpu/gk20a/hw_fb_gk20a.h +++ b/drivers/gpu/nvgpu/gk20a/hw_fb_gk20a.h | |||
@@ -202,10 +202,18 @@ static inline u32 fb_mmu_debug_ctrl_debug_enabled_v(void) | |||
202 | { | 202 | { |
203 | return 0x00000001; | 203 | return 0x00000001; |
204 | } | 204 | } |
205 | static inline u32 fb_mmu_debug_ctrl_debug_enabled_f(void) | ||
206 | { | ||
207 | return 0x10000; | ||
208 | } | ||
205 | static inline u32 fb_mmu_debug_ctrl_debug_disabled_v(void) | 209 | static inline u32 fb_mmu_debug_ctrl_debug_disabled_v(void) |
206 | { | 210 | { |
207 | return 0x00000000; | 211 | return 0x00000000; |
208 | } | 212 | } |
213 | static inline u32 fb_mmu_debug_ctrl_debug_disabled_f(void) | ||
214 | { | ||
215 | return 0x0; | ||
216 | } | ||
209 | static inline u32 fb_mmu_vpr_info_r(void) | 217 | static inline u32 fb_mmu_vpr_info_r(void) |
210 | { | 218 | { |
211 | return 0x00100cd0; | 219 | return 0x00100cd0; |
diff --git a/drivers/gpu/nvgpu/gk20a/hw_gr_gk20a.h b/drivers/gpu/nvgpu/gk20a/hw_gr_gk20a.h index abe6b119..726d0ad3 100644 --- a/drivers/gpu/nvgpu/gk20a/hw_gr_gk20a.h +++ b/drivers/gpu/nvgpu/gk20a/hw_gr_gk20a.h | |||
@@ -3038,6 +3038,10 @@ static inline u32 gr_gpc0_tpc0_sm_dbgr_control0_r(void) | |||
3038 | { | 3038 | { |
3039 | return 0x00504610; | 3039 | return 0x00504610; |
3040 | } | 3040 | } |
3041 | static inline u32 gr_gpc0_tpc0_sm_dbgr_control0_debugger_mode_m(void) | ||
3042 | { | ||
3043 | return 0x1 << 0; | ||
3044 | } | ||
3041 | static inline u32 gr_gpc0_tpc0_sm_dbgr_control0_debugger_mode_v(u32 r) | 3045 | static inline u32 gr_gpc0_tpc0_sm_dbgr_control0_debugger_mode_v(u32 r) |
3042 | { | 3046 | { |
3043 | return (r >> 0) & 0x1; | 3047 | return (r >> 0) & 0x1; |
@@ -3046,10 +3050,18 @@ static inline u32 gr_gpc0_tpc0_sm_dbgr_control0_debugger_mode_on_v(void) | |||
3046 | { | 3050 | { |
3047 | return 0x00000001; | 3051 | return 0x00000001; |
3048 | } | 3052 | } |
3053 | static inline u32 gr_gpc0_tpc0_sm_dbgr_control0_debugger_mode_on_f(void) | ||
3054 | { | ||
3055 | return 0x1; | ||
3056 | } | ||
3049 | static inline u32 gr_gpc0_tpc0_sm_dbgr_control0_debugger_mode_off_v(void) | 3057 | static inline u32 gr_gpc0_tpc0_sm_dbgr_control0_debugger_mode_off_v(void) |
3050 | { | 3058 | { |
3051 | return 0x00000000; | 3059 | return 0x00000000; |
3052 | } | 3060 | } |
3061 | static inline u32 gr_gpc0_tpc0_sm_dbgr_control0_debugger_mode_off_f(void) | ||
3062 | { | ||
3063 | return 0x0; | ||
3064 | } | ||
3053 | static inline u32 gr_gpc0_tpc0_sm_dbgr_control0_stop_trigger_enable_f(void) | 3065 | static inline u32 gr_gpc0_tpc0_sm_dbgr_control0_stop_trigger_enable_f(void) |
3054 | { | 3066 | { |
3055 | return 0x80000000; | 3067 | return 0x80000000; |
@@ -3062,6 +3074,10 @@ static inline u32 gr_gpc0_tpc0_sm_dbgr_control0_run_trigger_task_f(void) | |||
3062 | { | 3074 | { |
3063 | return 0x40000000; | 3075 | return 0x40000000; |
3064 | } | 3076 | } |
3077 | static inline u32 gr_gpc0_tpc0_sm_dbgr_control0_stop_on_any_warp_m(void) | ||
3078 | { | ||
3079 | return 0x1 << 1; | ||
3080 | } | ||
3065 | static inline u32 gr_gpc0_tpc0_sm_dbgr_control0_stop_on_any_warp_v(u32 r) | 3081 | static inline u32 gr_gpc0_tpc0_sm_dbgr_control0_stop_on_any_warp_v(u32 r) |
3066 | { | 3082 | { |
3067 | return (r >> 1) & 0x1; | 3083 | return (r >> 1) & 0x1; |
@@ -3070,6 +3086,10 @@ static inline u32 gr_gpc0_tpc0_sm_dbgr_control0_stop_on_any_warp_disable_f(void) | |||
3070 | { | 3086 | { |
3071 | return 0x0; | 3087 | return 0x0; |
3072 | } | 3088 | } |
3089 | static inline u32 gr_gpc0_tpc0_sm_dbgr_control0_stop_on_any_sm_m(void) | ||
3090 | { | ||
3091 | return 0x1 << 2; | ||
3092 | } | ||
3073 | static inline u32 gr_gpc0_tpc0_sm_dbgr_control0_stop_on_any_sm_v(u32 r) | 3093 | static inline u32 gr_gpc0_tpc0_sm_dbgr_control0_stop_on_any_sm_v(u32 r) |
3074 | { | 3094 | { |
3075 | return (r >> 2) & 0x1; | 3095 | return (r >> 2) & 0x1; |
diff --git a/drivers/gpu/nvgpu/gm20b/hw_fb_gm20b.h b/drivers/gpu/nvgpu/gm20b/hw_fb_gm20b.h index 214306cb..5ec4a46e 100644 --- a/drivers/gpu/nvgpu/gm20b/hw_fb_gm20b.h +++ b/drivers/gpu/nvgpu/gm20b/hw_fb_gm20b.h | |||
@@ -222,10 +222,18 @@ static inline u32 fb_mmu_debug_ctrl_debug_enabled_v(void) | |||
222 | { | 222 | { |
223 | return 0x00000001; | 223 | return 0x00000001; |
224 | } | 224 | } |
225 | static inline u32 fb_mmu_debug_ctrl_debug_enabled_f(void) | ||
226 | { | ||
227 | return 0x10000; | ||
228 | } | ||
225 | static inline u32 fb_mmu_debug_ctrl_debug_disabled_v(void) | 229 | static inline u32 fb_mmu_debug_ctrl_debug_disabled_v(void) |
226 | { | 230 | { |
227 | return 0x00000000; | 231 | return 0x00000000; |
228 | } | 232 | } |
233 | static inline u32 fb_mmu_debug_ctrl_debug_disabled_f(void) | ||
234 | { | ||
235 | return 0x0; | ||
236 | } | ||
229 | static inline u32 fb_mmu_vpr_info_r(void) | 237 | static inline u32 fb_mmu_vpr_info_r(void) |
230 | { | 238 | { |
231 | return 0x00100cd0; | 239 | return 0x00100cd0; |
diff --git a/drivers/gpu/nvgpu/gm20b/hw_gr_gm20b.h b/drivers/gpu/nvgpu/gm20b/hw_gr_gm20b.h index d91d40af..a941eb59 100644 --- a/drivers/gpu/nvgpu/gm20b/hw_gr_gm20b.h +++ b/drivers/gpu/nvgpu/gm20b/hw_gr_gm20b.h | |||
@@ -3070,6 +3070,10 @@ static inline u32 gr_gpc0_tpc0_sm_dbgr_control0_r(void) | |||
3070 | { | 3070 | { |
3071 | return 0x00504610; | 3071 | return 0x00504610; |
3072 | } | 3072 | } |
3073 | static inline u32 gr_gpc0_tpc0_sm_dbgr_control0_debugger_mode_m(void) | ||
3074 | { | ||
3075 | return 0x1 << 0; | ||
3076 | } | ||
3073 | static inline u32 gr_gpc0_tpc0_sm_dbgr_control0_debugger_mode_v(u32 r) | 3077 | static inline u32 gr_gpc0_tpc0_sm_dbgr_control0_debugger_mode_v(u32 r) |
3074 | { | 3078 | { |
3075 | return (r >> 0) & 0x1; | 3079 | return (r >> 0) & 0x1; |
@@ -3078,6 +3082,18 @@ static inline u32 gr_gpc0_tpc0_sm_dbgr_control0_debugger_mode_on_v(void) | |||
3078 | { | 3082 | { |
3079 | return 0x00000001; | 3083 | return 0x00000001; |
3080 | } | 3084 | } |
3085 | static inline u32 gr_gpc0_tpc0_sm_dbgr_control0_debugger_mode_on_f(void) | ||
3086 | { | ||
3087 | return 0x1; | ||
3088 | } | ||
3089 | static inline u32 gr_gpc0_tpc0_sm_dbgr_control0_debugger_mode_off_v(void) | ||
3090 | { | ||
3091 | return 0x00000000; | ||
3092 | } | ||
3093 | static inline u32 gr_gpc0_tpc0_sm_dbgr_control0_debugger_mode_off_f(void) | ||
3094 | { | ||
3095 | return 0x0; | ||
3096 | } | ||
3081 | static inline u32 gr_gpc0_tpc0_sm_dbgr_control0_stop_trigger_enable_f(void) | 3097 | static inline u32 gr_gpc0_tpc0_sm_dbgr_control0_stop_trigger_enable_f(void) |
3082 | { | 3098 | { |
3083 | return 0x80000000; | 3099 | return 0x80000000; |
@@ -3090,6 +3106,10 @@ static inline u32 gr_gpc0_tpc0_sm_dbgr_control0_run_trigger_task_f(void) | |||
3090 | { | 3106 | { |
3091 | return 0x40000000; | 3107 | return 0x40000000; |
3092 | } | 3108 | } |
3109 | static inline u32 gr_gpc0_tpc0_sm_dbgr_control0_stop_on_any_warp_m(void) | ||
3110 | { | ||
3111 | return 0x1 << 1; | ||
3112 | } | ||
3093 | static inline u32 gr_gpc0_tpc0_sm_dbgr_control0_stop_on_any_warp_v(u32 r) | 3113 | static inline u32 gr_gpc0_tpc0_sm_dbgr_control0_stop_on_any_warp_v(u32 r) |
3094 | { | 3114 | { |
3095 | return (r >> 1) & 0x1; | 3115 | return (r >> 1) & 0x1; |
@@ -3098,6 +3118,10 @@ static inline u32 gr_gpc0_tpc0_sm_dbgr_control0_stop_on_any_warp_disable_f(void) | |||
3098 | { | 3118 | { |
3099 | return 0x0; | 3119 | return 0x0; |
3100 | } | 3120 | } |
3121 | static inline u32 gr_gpc0_tpc0_sm_dbgr_control0_stop_on_any_sm_m(void) | ||
3122 | { | ||
3123 | return 0x1 << 2; | ||
3124 | } | ||
3101 | static inline u32 gr_gpc0_tpc0_sm_dbgr_control0_stop_on_any_sm_v(u32 r) | 3125 | static inline u32 gr_gpc0_tpc0_sm_dbgr_control0_stop_on_any_sm_v(u32 r) |
3102 | { | 3126 | { |
3103 | return (r >> 2) & 0x1; | 3127 | return (r >> 2) & 0x1; |