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-rw-r--r--drivers/gpu/nvgpu/gk20a/gk20a.h2
-rw-r--r--drivers/gpu/nvgpu/gk20a/gr_gk20a.c42
2 files changed, 24 insertions, 20 deletions
diff --git a/drivers/gpu/nvgpu/gk20a/gk20a.h b/drivers/gpu/nvgpu/gk20a/gk20a.h
index 1dd42dc2..18e99d6f 100644
--- a/drivers/gpu/nvgpu/gk20a/gk20a.h
+++ b/drivers/gpu/nvgpu/gk20a/gk20a.h
@@ -332,6 +332,7 @@ struct gpu_ops {
332 int (*commit_global_timeslice)(struct gk20a *g, 332 int (*commit_global_timeslice)(struct gk20a *g,
333 struct channel_gk20a *c, bool patch); 333 struct channel_gk20a *c, bool patch);
334 int (*commit_inst)(struct channel_gk20a *c, u64 gpu_va); 334 int (*commit_inst)(struct channel_gk20a *c, u64 gpu_va);
335 void (*restore_context_header)(struct gk20a *g, struct mem_desc *ctxheader);
335 } gr; 336 } gr;
336 const char *name; 337 const char *name;
337 struct { 338 struct {
@@ -420,6 +421,7 @@ struct gpu_ops {
420 u32 *runlist); 421 u32 *runlist);
421 u32 (*userd_gp_get)(struct gk20a *g, struct channel_gk20a *ch); 422 u32 (*userd_gp_get)(struct gk20a *g, struct channel_gk20a *ch);
422 void (*userd_gp_put)(struct gk20a *g, struct channel_gk20a *ch); 423 void (*userd_gp_put)(struct gk20a *g, struct channel_gk20a *ch);
424 void (*free_channel_ctx_header)(struct channel_gk20a *ch);
423 } fifo; 425 } fifo;
424 struct pmu_v { 426 struct pmu_v {
425 /*used for change of enum zbc update cmd id from ver 0 to ver1*/ 427 /*used for change of enum zbc update cmd id from ver 0 to ver1*/
diff --git a/drivers/gpu/nvgpu/gk20a/gr_gk20a.c b/drivers/gpu/nvgpu/gk20a/gr_gk20a.c
index be8894d2..48b825a1 100644
--- a/drivers/gpu/nvgpu/gk20a/gr_gk20a.c
+++ b/drivers/gpu/nvgpu/gk20a/gr_gk20a.c
@@ -1571,18 +1571,6 @@ static int gr_gk20a_init_golden_ctx_image(struct gk20a *g,
1571 mutex_lock(&gr->ctx_mutex); 1571 mutex_lock(&gr->ctx_mutex);
1572 1572
1573 if (gr->ctx_vars.golden_image_initialized) { 1573 if (gr->ctx_vars.golden_image_initialized) {
1574 if (gk20a_mem_begin(g, ctxheader))
1575 return -ENOMEM;
1576 if (ctxheader->gpu_va) {
1577 err = gr_gk20a_fecs_ctx_bind_channel(g, c);
1578 if (err)
1579 goto clean_up;
1580
1581 err = gr_gk20a_wait_idle(g,
1582 gk20a_get_gr_idle_timeout(g),
1583 GR_IDLE_CHECK_DEFAULT);
1584 }
1585 gk20a_mem_end(g, ctxheader);
1586 goto clean_up; 1574 goto clean_up;
1587 } 1575 }
1588 if (!platform->is_fmodel) { 1576 if (!platform->is_fmodel) {
@@ -1753,7 +1741,6 @@ restore_fe_go_idle:
1753 data = gk20a_mem_rd32(g, gr_mem, i); 1741 data = gk20a_mem_rd32(g, gr_mem, i);
1754 gk20a_mem_wr32(g, gold_mem, i, data); 1742 gk20a_mem_wr32(g, gold_mem, i, data);
1755 } 1743 }
1756
1757 gk20a_mem_wr(g, gold_mem, ctxsw_prog_main_image_zcull_o(), 1744 gk20a_mem_wr(g, gold_mem, ctxsw_prog_main_image_zcull_o(),
1758 ctxsw_prog_main_image_zcull_mode_no_ctxsw_v()); 1745 ctxsw_prog_main_image_zcull_mode_no_ctxsw_v());
1759 1746
@@ -1763,6 +1750,9 @@ restore_fe_go_idle:
1763 1750
1764 gr_gk20a_fecs_ctx_image_save(c, gr_fecs_method_push_adr_wfi_golden_save_v()); 1751 gr_gk20a_fecs_ctx_image_save(c, gr_fecs_method_push_adr_wfi_golden_save_v());
1765 1752
1753 if (gk20a_mem_begin(g, ctxheader))
1754 goto clean_up;
1755
1766 if (gr->ctx_vars.local_golden_image == NULL) { 1756 if (gr->ctx_vars.local_golden_image == NULL) {
1767 1757
1768 gr->ctx_vars.local_golden_image = 1758 gr->ctx_vars.local_golden_image =
@@ -1773,10 +1763,16 @@ restore_fe_go_idle:
1773 goto clean_up; 1763 goto clean_up;
1774 } 1764 }
1775 1765
1776 gk20a_mem_rd_n(g, gold_mem, 0, 1766 if (ctxheader->gpu_va)
1767 gk20a_mem_rd_n(g, ctxheader, 0,
1768 gr->ctx_vars.local_golden_image,
1769 gr->ctx_vars.golden_image_size);
1770 else
1771 gk20a_mem_rd_n(g, gold_mem, 0,
1777 gr->ctx_vars.local_golden_image, 1772 gr->ctx_vars.local_golden_image,
1778 gr->ctx_vars.golden_image_size); 1773 gr->ctx_vars.golden_image_size);
1779 } 1774 }
1775 gk20a_mem_end(g, ctxheader);
1780 1776
1781 g->ops.gr.commit_inst(c, gr_mem->gpu_va); 1777 g->ops.gr.commit_inst(c, gr_mem->gpu_va);
1782 1778
@@ -2016,7 +2012,6 @@ int gr_gk20a_load_golden_ctx_image(struct gk20a *g,
2016 if (gr->ctx_vars.local_golden_image == NULL) 2012 if (gr->ctx_vars.local_golden_image == NULL)
2017 return -1; 2013 return -1;
2018 2014
2019
2020 /* Channel gr_ctx buffer is gpu cacheable. 2015 /* Channel gr_ctx buffer is gpu cacheable.
2021 Flush and invalidate before cpu update. */ 2016 Flush and invalidate before cpu update. */
2022 g->ops.mm.l2_flush(g, true); 2017 g->ops.mm.l2_flush(g, true);
@@ -2029,15 +2024,22 @@ int gr_gk20a_load_golden_ctx_image(struct gk20a *g,
2029 goto clean_up_mem; 2024 goto clean_up_mem;
2030 } 2025 }
2031 2026
2032 gk20a_mem_wr_n(g, mem, 0, 2027 if (ctxheader->gpu_va) {
2028 if (g->ops.gr.restore_context_header)
2029 g->ops.gr.restore_context_header(g, ctxheader);
2030 } else {
2031 gk20a_mem_wr_n(g, mem, 0,
2033 gr->ctx_vars.local_golden_image, 2032 gr->ctx_vars.local_golden_image,
2034 gr->ctx_vars.golden_image_size); 2033 gr->ctx_vars.golden_image_size);
2034 gk20a_mem_wr(g, mem,
2035 ctxsw_prog_main_image_num_save_ops_o(), 0);
2036 gk20a_mem_wr(g, mem,
2037 ctxsw_prog_main_image_num_restore_ops_o(), 0);
2038 }
2035 2039
2036 if (g->ops.gr.enable_cde_in_fecs && c->cde) 2040 if (g->ops.gr.enable_cde_in_fecs && c->cde)
2037 g->ops.gr.enable_cde_in_fecs(g, mem); 2041 g->ops.gr.enable_cde_in_fecs(g, mem);
2038 2042
2039 gk20a_mem_wr(g, mem, ctxsw_prog_main_image_num_save_ops_o(), 0);
2040 gk20a_mem_wr(g, mem, ctxsw_prog_main_image_num_restore_ops_o(), 0);
2041 /* set priv access map */ 2043 /* set priv access map */
2042 virt_addr_lo = 2044 virt_addr_lo =
2043 u64_lo32(ch_ctx->global_ctx_buffer_va[PRIV_ACCESS_MAP_VA]); 2045 u64_lo32(ch_ctx->global_ctx_buffer_va[PRIV_ACCESS_MAP_VA]);
@@ -2145,9 +2147,7 @@ int gr_gk20a_load_golden_ctx_image(struct gk20a *g,
2145 ctxsw_prog_main_image_pm_ptr_o(), virt_addr); 2147 ctxsw_prog_main_image_pm_ptr_o(), virt_addr);
2146 } 2148 }
2147 2149
2148 gk20a_mem_end(g, mem);
2149 gk20a_mem_end(g, ctxheader); 2150 gk20a_mem_end(g, ctxheader);
2150
2151clean_up_mem: 2151clean_up_mem:
2152 gk20a_mem_end(g, mem); 2152 gk20a_mem_end(g, mem);
2153 2153
@@ -3065,6 +3065,8 @@ static void gr_gk20a_free_channel_pm_ctx(struct channel_gk20a *c)
3065 3065
3066void gk20a_free_channel_ctx(struct channel_gk20a *c) 3066void gk20a_free_channel_ctx(struct channel_gk20a *c)
3067{ 3067{
3068 if(c->g->ops.fifo.free_channel_ctx_header)
3069 c->g->ops.fifo.free_channel_ctx_header(c);
3068 gr_gk20a_unmap_global_ctx_buffers(c); 3070 gr_gk20a_unmap_global_ctx_buffers(c);
3069 gr_gk20a_free_channel_patch_ctx(c); 3071 gr_gk20a_free_channel_patch_ctx(c);
3070 gr_gk20a_free_channel_pm_ctx(c); 3072 gr_gk20a_free_channel_pm_ctx(c);