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-rw-r--r--drivers/gpu/nvgpu/gp10b/fifo_gp10b.c8
-rw-r--r--drivers/gpu/nvgpu/gp10b/gr_gp10b.c11
2 files changed, 10 insertions, 9 deletions
diff --git a/drivers/gpu/nvgpu/gp10b/fifo_gp10b.c b/drivers/gpu/nvgpu/gp10b/fifo_gp10b.c
index 89b5527d..aa38dc54 100644
--- a/drivers/gpu/nvgpu/gp10b/fifo_gp10b.c
+++ b/drivers/gpu/nvgpu/gp10b/fifo_gp10b.c
@@ -156,10 +156,10 @@ static int gp10b_fifo_resetup_ramfc(struct channel_gk20a *c)
156 156
157 if (new_syncpt && new_syncpt != old_syncpt) { 157 if (new_syncpt && new_syncpt != old_syncpt) {
158 /* disable channel */ 158 /* disable channel */
159 c->g->ops.fifo.disable_channel(c); 159 gk20a_disable_channel_tsg(c->g, c);
160 160
161 /* preempt the channel */ 161 /* preempt the channel */
162 WARN_ON(c->g->ops.fifo.preempt_channel(c->g, c->hw_chid)); 162 WARN_ON(gk20a_fifo_preempt(c->g, c));
163 163
164 v = pbdma_allowed_syncpoints_0_valid_f(1); 164 v = pbdma_allowed_syncpoints_0_valid_f(1);
165 165
@@ -173,9 +173,7 @@ static int gp10b_fifo_resetup_ramfc(struct channel_gk20a *c)
173 } 173 }
174 174
175 /* enable channel */ 175 /* enable channel */
176 gk20a_writel(c->g, ccsr_channel_r(c->hw_chid), 176 gk20a_enable_channel_tsg(c->g, c);
177 gk20a_readl(c->g, ccsr_channel_r(c->hw_chid)) |
178 ccsr_channel_enable_set_true_f());
179 177
180 gk20a_dbg_fn("done"); 178 gk20a_dbg_fn("done");
181 179
diff --git a/drivers/gpu/nvgpu/gp10b/gr_gp10b.c b/drivers/gpu/nvgpu/gp10b/gr_gp10b.c
index 205d2c97..5db65175 100644
--- a/drivers/gpu/nvgpu/gp10b/gr_gp10b.c
+++ b/drivers/gpu/nvgpu/gp10b/gr_gp10b.c
@@ -2061,18 +2061,21 @@ static int gr_gp10b_set_preemption_mode(struct channel_gk20a *ch,
2061 if (gk20a_mem_begin(g, mem)) 2061 if (gk20a_mem_begin(g, mem))
2062 return -ENOMEM; 2062 return -ENOMEM;
2063 2063
2064 g->ops.fifo.disable_channel(ch); 2064 err = gk20a_disable_channel_tsg(g, ch);
2065 err = g->ops.fifo.preempt_channel(g, ch->hw_chid);
2066 if (err) 2065 if (err)
2067 goto unmap_ctx; 2066 goto unmap_ctx;
2068 2067
2068 err = gk20a_fifo_preempt(g, ch);
2069 if (err)
2070 goto enable_ch;
2071
2069 if (g->ops.gr.update_ctxsw_preemption_mode) { 2072 if (g->ops.gr.update_ctxsw_preemption_mode) {
2070 g->ops.gr.update_ctxsw_preemption_mode(ch->g, ch_ctx, mem); 2073 g->ops.gr.update_ctxsw_preemption_mode(ch->g, ch_ctx, mem);
2071 g->ops.gr.commit_global_cb_manager(g, ch, true); 2074 g->ops.gr.commit_global_cb_manager(g, ch, true);
2072 } 2075 }
2073 2076
2074 g->ops.fifo.enable_channel(ch); 2077enable_ch:
2075 2078 gk20a_enable_channel_tsg(g, ch);
2076unmap_ctx: 2079unmap_ctx:
2077 gk20a_mem_end(g, mem); 2080 gk20a_mem_end(g, mem);
2078 2081