diff options
-rw-r--r-- | drivers/gpu/nvgpu/gp106/acr_gp106.h | 8 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gp106/flcn_gp106.h | 6 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gp106/gr_ctx_gp106.h | 8 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gp106/gr_gp106.h | 8 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gp106/hal_gp106.h | 8 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gp106/mclk_gp106.h | 8 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gp106/pmu_gp106.h | 6 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gp106/regops_gp106.h | 6 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gp106/sec2_gp106.h | 8 |
9 files changed, 33 insertions, 33 deletions
diff --git a/drivers/gpu/nvgpu/gp106/acr_gp106.h b/drivers/gpu/nvgpu/gp106/acr_gp106.h index 79015a0a..3fab1509 100644 --- a/drivers/gpu/nvgpu/gp106/acr_gp106.h +++ b/drivers/gpu/nvgpu/gp106/acr_gp106.h | |||
@@ -1,5 +1,5 @@ | |||
1 | /* | 1 | /* |
2 | * Copyright (c) 2016-2017, NVIDIA CORPORATION. All rights reserved. | 2 | * Copyright (c) 2016-2018, NVIDIA CORPORATION. All rights reserved. |
3 | * | 3 | * |
4 | * Permission is hereby granted, free of charge, to any person obtaining a | 4 | * Permission is hereby granted, free of charge, to any person obtaining a |
5 | * copy of this software and associated documentation files (the "Software"), | 5 | * copy of this software and associated documentation files (the "Software"), |
@@ -20,8 +20,8 @@ | |||
20 | * DEALINGS IN THE SOFTWARE. | 20 | * DEALINGS IN THE SOFTWARE. |
21 | */ | 21 | */ |
22 | 22 | ||
23 | #ifndef __ACR_GP106_H_ | 23 | #ifndef NVGPU_ACR_GP106_H |
24 | #define __ACR_GP106_H_ | 24 | #define NVGPU_ACR_GP106_H |
25 | 25 | ||
26 | #define GP106_FECS_UCODE_SIG "gp106/fecs_sig.bin" | 26 | #define GP106_FECS_UCODE_SIG "gp106/fecs_sig.bin" |
27 | #define GP106_GPCCS_UCODE_SIG "gp106/gpccs_sig.bin" | 27 | #define GP106_GPCCS_UCODE_SIG "gp106/gpccs_sig.bin" |
@@ -63,4 +63,4 @@ int gp106_flcn_populate_bl_dmem_desc(struct gk20a *g, | |||
63 | void *lsfm, u32 *p_bl_gen_desc_size, u32 falconid); | 63 | void *lsfm, u32 *p_bl_gen_desc_size, u32 falconid); |
64 | int lsfm_fill_flcn_bl_gen_desc(struct gk20a *g, | 64 | int lsfm_fill_flcn_bl_gen_desc(struct gk20a *g, |
65 | struct lsfm_managed_ucode_img_v2 *pnode); | 65 | struct lsfm_managed_ucode_img_v2 *pnode); |
66 | #endif /*__PMU_GP106_H_*/ | 66 | #endif /* NVGPU_ACR_GP106_H */ |
diff --git a/drivers/gpu/nvgpu/gp106/flcn_gp106.h b/drivers/gpu/nvgpu/gp106/flcn_gp106.h index 49275234..d1673734 100644 --- a/drivers/gpu/nvgpu/gp106/flcn_gp106.h +++ b/drivers/gpu/nvgpu/gp106/flcn_gp106.h | |||
@@ -19,9 +19,9 @@ | |||
19 | * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER | 19 | * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER |
20 | * DEALINGS IN THE SOFTWARE. | 20 | * DEALINGS IN THE SOFTWARE. |
21 | */ | 21 | */ |
22 | #ifndef __FLCN_GP106_H__ | 22 | #ifndef NVGPU_FLCN_GP106_H |
23 | #define __FLCN_GP106_H__ | 23 | #define NVGPU_FLCN_GP106_H |
24 | 24 | ||
25 | int gp106_falcon_hal_sw_init(struct nvgpu_falcon *flcn); | 25 | int gp106_falcon_hal_sw_init(struct nvgpu_falcon *flcn); |
26 | 26 | ||
27 | #endif /* __FLCN_GP106_H__ */ | 27 | #endif /* NVGPU_FLCN_GP106_H */ |
diff --git a/drivers/gpu/nvgpu/gp106/gr_ctx_gp106.h b/drivers/gpu/nvgpu/gp106/gr_ctx_gp106.h index 02e53060..d17fd18a 100644 --- a/drivers/gpu/nvgpu/gp106/gr_ctx_gp106.h +++ b/drivers/gpu/nvgpu/gp106/gr_ctx_gp106.h | |||
@@ -1,5 +1,5 @@ | |||
1 | /* | 1 | /* |
2 | * Copyright (c) 2016-2017, NVIDIA CORPORATION. All rights reserved. | 2 | * Copyright (c) 2016-2018, NVIDIA CORPORATION. All rights reserved. |
3 | * | 3 | * |
4 | * Permission is hereby granted, free of charge, to any person obtaining a | 4 | * Permission is hereby granted, free of charge, to any person obtaining a |
5 | * copy of this software and associated documentation files (the "Software"), | 5 | * copy of this software and associated documentation files (the "Software"), |
@@ -19,8 +19,8 @@ | |||
19 | * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER | 19 | * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER |
20 | * DEALINGS IN THE SOFTWARE. | 20 | * DEALINGS IN THE SOFTWARE. |
21 | */ | 21 | */ |
22 | #ifndef __GR_CTX_GP106_H__ | 22 | #ifndef NVGPU_GR_CTX_GP106_H |
23 | #define __GR_CTX_GP106_H__ | 23 | #define NVGPU_GR_CTX_GP106_H |
24 | 24 | ||
25 | #include "gk20a/gr_ctx_gk20a.h" | 25 | #include "gk20a/gr_ctx_gk20a.h" |
26 | 26 | ||
@@ -31,4 +31,4 @@ | |||
31 | int gr_gp106_get_netlist_name(struct gk20a *g, int index, char *name); | 31 | int gr_gp106_get_netlist_name(struct gk20a *g, int index, char *name); |
32 | bool gr_gp106_is_firmware_defined(void); | 32 | bool gr_gp106_is_firmware_defined(void); |
33 | 33 | ||
34 | #endif /*__GR_CTX_GP106_H__*/ | 34 | #endif /* NVGPU_GR_CTX_GP106_H */ |
diff --git a/drivers/gpu/nvgpu/gp106/gr_gp106.h b/drivers/gpu/nvgpu/gp106/gr_gp106.h index 491ced4e..25d58169 100644 --- a/drivers/gpu/nvgpu/gp106/gr_gp106.h +++ b/drivers/gpu/nvgpu/gp106/gr_gp106.h | |||
@@ -1,7 +1,7 @@ | |||
1 | /* | 1 | /* |
2 | * GP106 GPU GR | 2 | * GP106 GPU GR |
3 | * | 3 | * |
4 | * Copyright (c) 2016-2017, NVIDIA CORPORATION. All rights reserved. | 4 | * Copyright (c) 2016-2018, NVIDIA CORPORATION. All rights reserved. |
5 | * | 5 | * |
6 | * Permission is hereby granted, free of charge, to any person obtaining a | 6 | * Permission is hereby granted, free of charge, to any person obtaining a |
7 | * copy of this software and associated documentation files (the "Software"), | 7 | * copy of this software and associated documentation files (the "Software"), |
@@ -22,8 +22,8 @@ | |||
22 | * DEALINGS IN THE SOFTWARE. | 22 | * DEALINGS IN THE SOFTWARE. |
23 | */ | 23 | */ |
24 | 24 | ||
25 | #ifndef _NVGPU_GR_GP106_H_ | 25 | #ifndef NVGPU_GR_GP106_H |
26 | #define _NVGPU_GR_GP106_H_ | 26 | #define NVGPU_GR_GP106_H |
27 | 27 | ||
28 | struct gk20a; | 28 | struct gk20a; |
29 | 29 | ||
@@ -43,4 +43,4 @@ int gr_gp106_set_ctxsw_preemption_mode(struct gk20a *g, | |||
43 | u32 graphics_preempt_mode, | 43 | u32 graphics_preempt_mode, |
44 | u32 compute_preempt_mode); | 44 | u32 compute_preempt_mode); |
45 | 45 | ||
46 | #endif | 46 | #endif /* NVGPU_GR_GP106_H */ |
diff --git a/drivers/gpu/nvgpu/gp106/hal_gp106.h b/drivers/gpu/nvgpu/gp106/hal_gp106.h index d030c6a6..d46dacec 100644 --- a/drivers/gpu/nvgpu/gp106/hal_gp106.h +++ b/drivers/gpu/nvgpu/gp106/hal_gp106.h | |||
@@ -1,7 +1,7 @@ | |||
1 | /* | 1 | /* |
2 | * GP106 Tegra HAL interface | 2 | * GP106 Tegra HAL interface |
3 | * | 3 | * |
4 | * Copyright (c) 2016, NVIDIA CORPORATION. All rights reserved. | 4 | * Copyright (c) 2016-2018, NVIDIA CORPORATION. All rights reserved. |
5 | * | 5 | * |
6 | * Permission is hereby granted, free of charge, to any person obtaining a | 6 | * Permission is hereby granted, free of charge, to any person obtaining a |
7 | * copy of this software and associated documentation files (the "Software"), | 7 | * copy of this software and associated documentation files (the "Software"), |
@@ -22,9 +22,9 @@ | |||
22 | * DEALINGS IN THE SOFTWARE. | 22 | * DEALINGS IN THE SOFTWARE. |
23 | */ | 23 | */ |
24 | 24 | ||
25 | #ifndef _NVGPU_HAL_GP106_H | 25 | #ifndef NVGPU_HAL_GP106_H |
26 | #define _NVGPU_HAL_GP106_H | 26 | #define NVGPU_HAL_GP106_H |
27 | struct gk20a; | 27 | struct gk20a; |
28 | 28 | ||
29 | int gp106_init_hal(struct gk20a *gops); | 29 | int gp106_init_hal(struct gk20a *gops); |
30 | #endif | 30 | #endif /* NVGPU_HAL_GP106_H */ |
diff --git a/drivers/gpu/nvgpu/gp106/mclk_gp106.h b/drivers/gpu/nvgpu/gp106/mclk_gp106.h index 9f261b6e..7f5131a7 100644 --- a/drivers/gpu/nvgpu/gp106/mclk_gp106.h +++ b/drivers/gpu/nvgpu/gp106/mclk_gp106.h | |||
@@ -1,5 +1,5 @@ | |||
1 | /* | 1 | /* |
2 | * Copyright (c) 2017, NVIDIA CORPORATION. All rights reserved. | 2 | * Copyright (c) 2017-2018, NVIDIA CORPORATION. All rights reserved. |
3 | * | 3 | * |
4 | * Permission is hereby granted, free of charge, to any person obtaining a | 4 | * Permission is hereby granted, free of charge, to any person obtaining a |
5 | * copy of this software and associated documentation files (the "Software"), | 5 | * copy of this software and associated documentation files (the "Software"), |
@@ -20,11 +20,11 @@ | |||
20 | * DEALINGS IN THE SOFTWARE. | 20 | * DEALINGS IN THE SOFTWARE. |
21 | */ | 21 | */ |
22 | 22 | ||
23 | #ifndef _MCLK_GP106_H_ | 23 | #ifndef NVGPU_MCLK_GP106_H |
24 | #define _MCLK_GP106_H_ | 24 | #define NVGPU_MCLK_GP106_H |
25 | 25 | ||
26 | extern int gp106_mclk_init(struct gk20a *g); | 26 | extern int gp106_mclk_init(struct gk20a *g); |
27 | extern void gp106_mclk_deinit(struct gk20a *g); | 27 | extern void gp106_mclk_deinit(struct gk20a *g); |
28 | extern int gp106_mclk_change(struct gk20a *g, u16 val); | 28 | extern int gp106_mclk_change(struct gk20a *g, u16 val); |
29 | 29 | ||
30 | #endif | 30 | #endif /* NVGPU_MCLK_GP106_H */ |
diff --git a/drivers/gpu/nvgpu/gp106/pmu_gp106.h b/drivers/gpu/nvgpu/gp106/pmu_gp106.h index 361f6e8b..9cf1202e 100644 --- a/drivers/gpu/nvgpu/gp106/pmu_gp106.h +++ b/drivers/gpu/nvgpu/gp106/pmu_gp106.h | |||
@@ -20,8 +20,8 @@ | |||
20 | * DEALINGS IN THE SOFTWARE. | 20 | * DEALINGS IN THE SOFTWARE. |
21 | */ | 21 | */ |
22 | 22 | ||
23 | #ifndef __PMU_GP106_H_ | 23 | #ifndef NVGPU_PMU_GP106_H |
24 | #define __PMU_GP106_H_ | 24 | #define NVGPU_PMU_GP106_H |
25 | 25 | ||
26 | #define gp106_dbg_pmu(g, fmt, arg...) \ | 26 | #define gp106_dbg_pmu(g, fmt, arg...) \ |
27 | nvgpu_log(g, gpu_dbg_pmu, fmt, ##arg) | 27 | nvgpu_log(g, gpu_dbg_pmu, fmt, ##arg) |
@@ -42,4 +42,4 @@ void gp106_pmu_elpg_statistics(struct gk20a *g, u32 pg_engine_id, | |||
42 | bool gp106_pmu_is_engine_in_reset(struct gk20a *g); | 42 | bool gp106_pmu_is_engine_in_reset(struct gk20a *g); |
43 | int gp106_pmu_engine_reset(struct gk20a *g, bool do_reset); | 43 | int gp106_pmu_engine_reset(struct gk20a *g, bool do_reset); |
44 | 44 | ||
45 | #endif /*__PMU_GP106_H_*/ | 45 | #endif /* NVGPU_PMU_GP106_H */ |
diff --git a/drivers/gpu/nvgpu/gp106/regops_gp106.h b/drivers/gpu/nvgpu/gp106/regops_gp106.h index 45f1fb49..3de27104 100644 --- a/drivers/gpu/nvgpu/gp106/regops_gp106.h +++ b/drivers/gpu/nvgpu/gp106/regops_gp106.h | |||
@@ -22,8 +22,8 @@ | |||
22 | * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER | 22 | * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER |
23 | * DEALINGS IN THE SOFTWARE. | 23 | * DEALINGS IN THE SOFTWARE. |
24 | */ | 24 | */ |
25 | #ifndef __REGOPS_GP106_H_ | 25 | #ifndef NVGPU_REGOPS_GP106_H |
26 | #define __REGOPS_GP106_H_ | 26 | #define NVGPU_REGOPS_GP106_H |
27 | 27 | ||
28 | const struct regop_offset_range *gp106_get_global_whitelist_ranges(void); | 28 | const struct regop_offset_range *gp106_get_global_whitelist_ranges(void); |
29 | u64 gp106_get_global_whitelist_ranges_count(void); | 29 | u64 gp106_get_global_whitelist_ranges_count(void); |
@@ -39,4 +39,4 @@ const struct regop_offset_range *gp106_get_qctl_whitelist_ranges(void); | |||
39 | u64 gp106_get_qctl_whitelist_ranges_count(void); | 39 | u64 gp106_get_qctl_whitelist_ranges_count(void); |
40 | int gp106_apply_smpc_war(struct dbg_session_gk20a *dbg_s); | 40 | int gp106_apply_smpc_war(struct dbg_session_gk20a *dbg_s); |
41 | 41 | ||
42 | #endif /* __REGOPS_GP106_H_ */ | 42 | #endif /* NVGPU_REGOPS_GP106_H */ |
diff --git a/drivers/gpu/nvgpu/gp106/sec2_gp106.h b/drivers/gpu/nvgpu/gp106/sec2_gp106.h index cab3ca5d..b17028e7 100644 --- a/drivers/gpu/nvgpu/gp106/sec2_gp106.h +++ b/drivers/gpu/nvgpu/gp106/sec2_gp106.h | |||
@@ -1,5 +1,5 @@ | |||
1 | /* | 1 | /* |
2 | * Copyright (c) 2016-2017, NVIDIA CORPORATION. All rights reserved. | 2 | * Copyright (c) 2016-2018, NVIDIA CORPORATION. All rights reserved. |
3 | * | 3 | * |
4 | * Permission is hereby granted, free of charge, to any person obtaining a | 4 | * Permission is hereby granted, free of charge, to any person obtaining a |
5 | * copy of this software and associated documentation files (the "Software"), | 5 | * copy of this software and associated documentation files (the "Software"), |
@@ -20,8 +20,8 @@ | |||
20 | * DEALINGS IN THE SOFTWARE. | 20 | * DEALINGS IN THE SOFTWARE. |
21 | */ | 21 | */ |
22 | 22 | ||
23 | #ifndef __SEC2_H_ | 23 | #ifndef NVGPU_SEC2_GP106_H |
24 | #define __SEC2_H_ | 24 | #define NVGPU_SEC2_GP106_H |
25 | 25 | ||
26 | int gp106_sec2_clear_halt_interrupt_status(struct gk20a *g, | 26 | int gp106_sec2_clear_halt_interrupt_status(struct gk20a *g, |
27 | unsigned int timeout); | 27 | unsigned int timeout); |
@@ -33,4 +33,4 @@ int init_sec2_setup_hw1(struct gk20a *g, | |||
33 | void *desc, u32 bl_sz); | 33 | void *desc, u32 bl_sz); |
34 | int gp106_sec2_reset(struct gk20a *g); | 34 | int gp106_sec2_reset(struct gk20a *g); |
35 | 35 | ||
36 | #endif /*__SEC2_H_*/ | 36 | #endif /* NVGPU_SEC2_GP106_H */ |