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-rw-r--r--drivers/gpu/nvgpu/vgpu/gk20a/vgpu_gr_gk20a.c29
-rw-r--r--drivers/gpu/nvgpu/vgpu/gm20b/vgpu_gr_gm20b.c21
-rw-r--r--drivers/gpu/nvgpu/vgpu/gr_vgpu.c15
-rw-r--r--include/linux/tegra_vgpu.h5
4 files changed, 19 insertions, 51 deletions
diff --git a/drivers/gpu/nvgpu/vgpu/gk20a/vgpu_gr_gk20a.c b/drivers/gpu/nvgpu/vgpu/gk20a/vgpu_gr_gk20a.c
index a8526457..0ba8db56 100644
--- a/drivers/gpu/nvgpu/vgpu/gk20a/vgpu_gr_gk20a.c
+++ b/drivers/gpu/nvgpu/vgpu/gk20a/vgpu_gr_gk20a.c
@@ -13,37 +13,9 @@
13 13
14#include <linux/kernel.h> 14#include <linux/kernel.h>
15 15
16#include "gk20a/hw_gr_gk20a.h"
17#include "gk20a/gk20a.h" 16#include "gk20a/gk20a.h"
18#include "vgpu/vgpu.h"
19#include "vgpu_gr_gk20a.h" 17#include "vgpu_gr_gk20a.h"
20 18
21static void vgpu_gk20a_detect_sm_arch(struct gk20a *g)
22{
23 u32 v = 0, raw_version, version = 0;
24
25 gk20a_dbg_fn("");
26
27 if (vgpu_get_attribute(vgpu_get_handle(g),
28 TEGRA_VGPU_ATTRIB_GPC0_TPC0_SM_ARCH, &v))
29 gk20a_err(dev_from_gk20a(g), "failed to retrieve SM arch");
30
31 raw_version = gr_gpc0_tpc0_sm_arch_spa_version_v(v);
32
33 if (raw_version == gr_gpc0_tpc0_sm_arch_spa_version_smkepler_lp_v())
34 version = 0x320; /* SM 3.2 */
35 else
36 gk20a_err(dev_from_gk20a(g), "Unknown SM version 0x%x",
37 raw_version);
38
39 /* on Kepler, SM version == SPA version */
40 g->gpu_characteristics.sm_arch_spa_version = version;
41 g->gpu_characteristics.sm_arch_sm_version = version;
42
43 g->gpu_characteristics.sm_arch_warp_count =
44 gr_gpc0_tpc0_sm_arch_warp_count_v(v);
45}
46
47static int vgpu_gk20a_init_fs_state(struct gk20a *g) 19static int vgpu_gk20a_init_fs_state(struct gk20a *g)
48{ 20{
49 struct gr_gk20a *gr = &g->gr; 21 struct gr_gk20a *gr = &g->gr;
@@ -73,6 +45,5 @@ static int vgpu_gk20a_init_fs_state(struct gk20a *g)
73 45
74void vgpu_gk20a_init_gr_ops(struct gpu_ops *gops) 46void vgpu_gk20a_init_gr_ops(struct gpu_ops *gops)
75{ 47{
76 gops->gr.detect_sm_arch = vgpu_gk20a_detect_sm_arch;
77 gops->gr.init_fs_state = vgpu_gk20a_init_fs_state; 48 gops->gr.init_fs_state = vgpu_gk20a_init_fs_state;
78} 49}
diff --git a/drivers/gpu/nvgpu/vgpu/gm20b/vgpu_gr_gm20b.c b/drivers/gpu/nvgpu/vgpu/gm20b/vgpu_gr_gm20b.c
index aaddd218..8e44eda4 100644
--- a/drivers/gpu/nvgpu/vgpu/gm20b/vgpu_gr_gm20b.c
+++ b/drivers/gpu/nvgpu/vgpu/gm20b/vgpu_gr_gm20b.c
@@ -13,29 +13,9 @@
13 13
14#include <linux/kernel.h> 14#include <linux/kernel.h>
15 15
16#include "gm20b/hw_gr_gm20b.h"
17#include "gk20a/gk20a.h" 16#include "gk20a/gk20a.h"
18#include "vgpu/vgpu.h"
19#include "vgpu_gr_gm20b.h" 17#include "vgpu_gr_gm20b.h"
20 18
21static void vgpu_gm20b_detect_sm_arch(struct gk20a *g)
22{
23 u32 v = 0;
24
25 gk20a_dbg_fn("");
26
27 if (vgpu_get_attribute(vgpu_get_handle(g),
28 TEGRA_VGPU_ATTRIB_GPC0_TPC0_SM_ARCH, &v))
29 gk20a_err(dev_from_gk20a(g), "failed to retrieve SM arch");
30
31 g->gpu_characteristics.sm_arch_spa_version =
32 gr_gpc0_tpc0_sm_arch_spa_version_v(v);
33 g->gpu_characteristics.sm_arch_sm_version =
34 gr_gpc0_tpc0_sm_arch_sm_version_v(v);
35 g->gpu_characteristics.sm_arch_warp_count =
36 gr_gpc0_tpc0_sm_arch_warp_count_v(v);
37}
38
39static int vgpu_gm20b_init_fs_state(struct gk20a *g) 19static int vgpu_gm20b_init_fs_state(struct gk20a *g)
40{ 20{
41 struct gr_gk20a *gr = &g->gr; 21 struct gr_gk20a *gr = &g->gr;
@@ -60,6 +40,5 @@ static int vgpu_gm20b_init_fs_state(struct gk20a *g)
60 40
61void vgpu_gm20b_init_gr_ops(struct gpu_ops *gops) 41void vgpu_gm20b_init_gr_ops(struct gpu_ops *gops)
62{ 42{
63 gops->gr.detect_sm_arch = vgpu_gm20b_detect_sm_arch;
64 gops->gr.init_fs_state = vgpu_gm20b_init_fs_state; 43 gops->gr.init_fs_state = vgpu_gm20b_init_fs_state;
65} 44}
diff --git a/drivers/gpu/nvgpu/vgpu/gr_vgpu.c b/drivers/gpu/nvgpu/vgpu/gr_vgpu.c
index bb52347f..a2af0162 100644
--- a/drivers/gpu/nvgpu/vgpu/gr_vgpu.c
+++ b/drivers/gpu/nvgpu/vgpu/gr_vgpu.c
@@ -17,6 +17,20 @@
17#include "gk20a/hw_gr_gk20a.h" 17#include "gk20a/hw_gr_gk20a.h"
18#include "gk20a/dbg_gpu_gk20a.h" 18#include "gk20a/dbg_gpu_gk20a.h"
19 19
20static void vgpu_gr_detect_sm_arch(struct gk20a *g)
21{
22 struct vgpu_priv_data *priv = vgpu_get_priv_data(g);
23
24 gk20a_dbg_fn("");
25
26 g->gpu_characteristics.sm_arch_sm_version =
27 priv->constants.sm_arch_sm_version;
28 g->gpu_characteristics.sm_arch_spa_version =
29 priv->constants.sm_arch_spa_version;
30 g->gpu_characteristics.sm_arch_warp_count =
31 priv->constants.sm_arch_warp_count;
32}
33
20static int vgpu_gr_commit_inst(struct channel_gk20a *c, u64 gpu_va) 34static int vgpu_gr_commit_inst(struct channel_gk20a *c, u64 gpu_va)
21{ 35{
22 struct tegra_vgpu_cmd_msg msg; 36 struct tegra_vgpu_cmd_msg msg;
@@ -1095,6 +1109,7 @@ static int vgpu_gr_update_hwpm_ctxsw_mode(struct gk20a *g,
1095 1109
1096void vgpu_init_gr_ops(struct gpu_ops *gops) 1110void vgpu_init_gr_ops(struct gpu_ops *gops)
1097{ 1111{
1112 gops->gr.detect_sm_arch = vgpu_gr_detect_sm_arch;
1098 gops->gr.free_channel_ctx = vgpu_gr_free_channel_ctx; 1113 gops->gr.free_channel_ctx = vgpu_gr_free_channel_ctx;
1099 gops->gr.alloc_obj_ctx = vgpu_gr_alloc_obj_ctx; 1114 gops->gr.alloc_obj_ctx = vgpu_gr_alloc_obj_ctx;
1100 gops->gr.free_obj_ctx = vgpu_gr_free_obj_ctx; 1115 gops->gr.free_obj_ctx = vgpu_gr_free_obj_ctx;
diff --git a/include/linux/tegra_vgpu.h b/include/linux/tegra_vgpu.h
index ef4c36d9..d30ae41d 100644
--- a/include/linux/tegra_vgpu.h
+++ b/include/linux/tegra_vgpu.h
@@ -120,7 +120,7 @@ enum {
120 TEGRA_VGPU_ATTRIB_MAX_TPC_COUNT = 6, 120 TEGRA_VGPU_ATTRIB_MAX_TPC_COUNT = 6,
121 TEGRA_VGPU_ATTRIB_PMC_BOOT_0 = 7, /* deprecated */ 121 TEGRA_VGPU_ATTRIB_PMC_BOOT_0 = 7, /* deprecated */
122 TEGRA_VGPU_ATTRIB_L2_SIZE = 8, /* deprecated */ 122 TEGRA_VGPU_ATTRIB_L2_SIZE = 8, /* deprecated */
123 TEGRA_VGPU_ATTRIB_GPC0_TPC0_SM_ARCH = 9, 123 TEGRA_VGPU_ATTRIB_GPC0_TPC0_SM_ARCH = 9, /* deprecated */
124 TEGRA_VGPU_ATTRIB_NUM_FBPS = 10, 124 TEGRA_VGPU_ATTRIB_NUM_FBPS = 10,
125 TEGRA_VGPU_ATTRIB_FBP_EN_MASK = 11, 125 TEGRA_VGPU_ATTRIB_FBP_EN_MASK = 11,
126 TEGRA_VGPU_ATTRIB_MAX_LTC_PER_FBP = 12, 126 TEGRA_VGPU_ATTRIB_MAX_LTC_PER_FBP = 12,
@@ -417,6 +417,9 @@ struct tegra_vgpu_constants_params {
417 u32 slices_per_ltc; 417 u32 slices_per_ltc;
418 u32 comptags_per_cacheline; 418 u32 comptags_per_cacheline;
419 u32 comptag_lines; 419 u32 comptag_lines;
420 u32 sm_arch_sm_version;
421 u32 sm_arch_spa_version;
422 u32 sm_arch_warp_count;
420}; 423};
421 424
422struct tegra_vgpu_cmd_msg { 425struct tegra_vgpu_cmd_msg {