4 files changed, 32 insertions, 1 deletions

diff --git a/drivers/gpu/nvgpu/gk20a/gk20a.h b/drivers/gpu/nvgpu/gk20a/gk20a.h
index 6f47f228..36bc0fb7 100644
--- a/drivers/gpu/nvgpu/gk20a/gk20a.h
+++ b/drivers/gpu/nvgpu/gk20a/gk20a.h
@@ -340,6 +340,7 @@ struct gpu_ops {
                                         u32 new_level);
                 int (*channel_set_timeslice)(struct channel_gk20a *ch,
                                         u32 timeslice);
+                int (*tsg_set_timeslice)(struct tsg_gk20a *tsg, u32 timeslice);
                 int (*force_reset_ch)(struct channel_gk20a *ch, bool verbose);
                 int (*engine_enum_from_type)(struct gk20a *g, u32 engine_type,
                                         u32 *inst_id);
diff --git a/drivers/gpu/nvgpu/gk20a/tsg_gk20a.c b/drivers/gpu/nvgpu/gk20a/tsg_gk20a.c
index 1e479395..5298d380 100644
--- a/drivers/gpu/nvgpu/gk20a/tsg_gk20a.c
+++ b/drivers/gpu/nvgpu/gk20a/tsg_gk20a.c
@@ -582,7 +582,7 @@ long gk20a_tsg_dev_ioctl(struct file *filp, unsigned int cmd,
                            "failed to host gk20a for ioctl cmd: 0x%x", cmd);
                         return err;
                 }
-                err = gk20a_tsg_set_timeslice(tsg,
+                err = g->ops.fifo.tsg_set_timeslice(tsg,
                         ((struct nvgpu_timeslice_args *)buf)->timeslice_us);
                 gk20a_idle(g->dev);
                 break;
@@ -607,4 +607,5 @@ void gk20a_init_tsg_ops(struct gpu_ops *gops)
 {
         gops->fifo.tsg_bind_channel = gk20a_tsg_bind_channel;
         gops->fifo.tsg_unbind_channel = gk20a_tsg_unbind_channel;
+        gops->fifo.tsg_set_timeslice = gk20a_tsg_set_timeslice;
 }
diff --git a/drivers/gpu/nvgpu/vgpu/tsg_vgpu.c b/drivers/gpu/nvgpu/vgpu/tsg_vgpu.c
index 9245693d..820a3db3 100644
--- a/drivers/gpu/nvgpu/vgpu/tsg_vgpu.c
+++ b/drivers/gpu/nvgpu/vgpu/tsg_vgpu.c
@@ -78,8 +78,30 @@ static int vgpu_tsg_unbind_channel(struct channel_gk20a *ch)
         return err;
 }
 
+static int vgpu_tsg_set_timeslice(struct tsg_gk20a *tsg, u32 timeslice)
+{
+        struct gk20a_platform *platform = gk20a_get_platform(tsg->g->dev);
+        struct tegra_vgpu_cmd_msg msg = {0};
+        struct tegra_vgpu_tsg_timeslice_params *p =
+                                &msg.params.tsg_timeslice;
+        int err;
+
+        gk20a_dbg_fn("");
+
+        msg.cmd = TEGRA_VGPU_CMD_TSG_SET_TIMESLICE;
+        msg.handle = platform->virt_handle;
+        p->tsg_id = tsg->tsgid;
+        p->timeslice_us = timeslice;
+        err = vgpu_comm_sendrecv(&msg, sizeof(msg), sizeof(msg));
+        err = err ? err : msg.ret;
+        WARN_ON(err);
+
+        return err;
+}
+
 void vgpu_init_tsg_ops(struct gpu_ops *gops)
 {
         gops->fifo.tsg_bind_channel = vgpu_tsg_bind_channel;
         gops->fifo.tsg_unbind_channel = vgpu_tsg_unbind_channel;
+        gops->fifo.tsg_set_timeslice = vgpu_tsg_set_timeslice;
 }
diff --git a/include/linux/tegra_vgpu.h b/include/linux/tegra_vgpu.h
index bdaabf29..706d87e4 100644
--- a/include/linux/tegra_vgpu.h
+++ b/include/linux/tegra_vgpu.h
@@ -91,6 +91,7 @@ enum {
         TEGRA_VGPU_CMD_TSG_BIND_CHANNEL,
         TEGRA_VGPU_CMD_TSG_UNBIND_CHANNEL,
         TEGRA_VGPU_CMD_TSG_PREEMPT,
+        TEGRA_VGPU_CMD_TSG_SET_TIMESLICE,
 };
 
 struct tegra_vgpu_connect_params {
@@ -373,6 +374,11 @@ struct tegra_vgpu_tsg_preempt_params {
         u32 tsg_id;
 };
 
+struct tegra_vgpu_tsg_timeslice_params {
+        u32 tsg_id;
+        u32 timeslice_us;
+};
+
 struct tegra_vgpu_cmd_msg {
         u32 cmd;
         int ret;
@@ -411,6 +417,7 @@ struct tegra_vgpu_cmd_msg {
                 struct tegra_vgpu_tsg_bind_gr_ctx_params tsg_bind_gr_ctx;
                 struct tegra_vgpu_tsg_bind_unbind_channel_params tsg_bind_unbind_channel;
                 struct tegra_vgpu_tsg_preempt_params tsg_preempt;
+                struct tegra_vgpu_tsg_timeslice_params tsg_timeslice;
                 char padding[192];
         } params;
 };