diff options
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/gk20a.h | 8 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gp106/xve_gp106.c | 14 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/include/nvgpu/hw/gp106/hw_xve_gp106.h | 5 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/pci.c | 26 |
4 files changed, 51 insertions, 2 deletions
diff --git a/drivers/gpu/nvgpu/gk20a/gk20a.h b/drivers/gpu/nvgpu/gk20a/gk20a.h index 19fa4e26..72f9170e 100644 --- a/drivers/gpu/nvgpu/gk20a/gk20a.h +++ b/drivers/gpu/nvgpu/gk20a/gk20a.h | |||
@@ -780,6 +780,9 @@ struct gpu_ops { | |||
780 | void (*xve_writel)(struct gk20a *g, u32 reg, u32 val); | 780 | void (*xve_writel)(struct gk20a *g, u32 reg, u32 val); |
781 | void (*disable_aspm)(struct gk20a *g); | 781 | void (*disable_aspm)(struct gk20a *g); |
782 | void (*reset_gpu)(struct gk20a *g); | 782 | void (*reset_gpu)(struct gk20a *g); |
783 | #if defined(CONFIG_PCI_MSI) | ||
784 | void (*rearm_msi)(struct gk20a *g); | ||
785 | #endif | ||
783 | } xve; | 786 | } xve; |
784 | }; | 787 | }; |
785 | 788 | ||
@@ -1037,6 +1040,11 @@ struct gk20a { | |||
1037 | 1040 | ||
1038 | /* Current warning temp in sfxp24.8 */ | 1041 | /* Current warning temp in sfxp24.8 */ |
1039 | s32 curr_warn_temp; | 1042 | s32 curr_warn_temp; |
1043 | |||
1044 | #if defined(CONFIG_PCI_MSI) | ||
1045 | /* Check if msi is enabled */ | ||
1046 | bool msi_enabled; | ||
1047 | #endif | ||
1040 | }; | 1048 | }; |
1041 | 1049 | ||
1042 | static inline unsigned long gk20a_get_gr_idle_timeout(struct gk20a *g) | 1050 | static inline unsigned long gk20a_get_gr_idle_timeout(struct gk20a *g) |
diff --git a/drivers/gpu/nvgpu/gp106/xve_gp106.c b/drivers/gpu/nvgpu/gp106/xve_gp106.c index 561140c6..83ae9306 100644 --- a/drivers/gpu/nvgpu/gp106/xve_gp106.c +++ b/drivers/gpu/nvgpu/gp106/xve_gp106.c | |||
@@ -1,5 +1,5 @@ | |||
1 | /* | 1 | /* |
2 | * Copyright (c) 2016, NVIDIA CORPORATION. All rights reserved. | 2 | * Copyright (c) 2016-2017, NVIDIA CORPORATION. All rights reserved. |
3 | * | 3 | * |
4 | * This program is free software; you can redistribute it and/or modify it | 4 | * This program is free software; you can redistribute it and/or modify it |
5 | * under the terms and conditions of the GNU General Public License, | 5 | * under the terms and conditions of the GNU General Public License, |
@@ -653,6 +653,14 @@ fail: | |||
653 | #endif | 653 | #endif |
654 | } | 654 | } |
655 | 655 | ||
656 | #if defined(CONFIG_PCI_MSI) | ||
657 | static void xve_rearm_msi_gp106(struct gk20a *g) | ||
658 | { | ||
659 | /* We just need to write a dummy val in the CYA_2 offset */ | ||
660 | g->ops.xve.xve_writel(g, xve_cya_2_r(), 0); | ||
661 | } | ||
662 | #endif | ||
663 | |||
656 | /* | 664 | /* |
657 | * Init the HAL functions and what not. xve_sw_init_gp106() is for initializing | 665 | * Init the HAL functions and what not. xve_sw_init_gp106() is for initializing |
658 | * all the other stuff like debugfs nodes, etc. | 666 | * all the other stuff like debugfs nodes, etc. |
@@ -667,6 +675,8 @@ int gp106_init_xve_ops(struct gpu_ops *gops) | |||
667 | gops->xve.xve_writel = xve_xve_writel_gp106; | 675 | gops->xve.xve_writel = xve_xve_writel_gp106; |
668 | gops->xve.disable_aspm = xve_disable_aspm_gp106; | 676 | gops->xve.disable_aspm = xve_disable_aspm_gp106; |
669 | gops->xve.reset_gpu = xve_reset_gpu_gp106; | 677 | gops->xve.reset_gpu = xve_reset_gpu_gp106; |
670 | 678 | #if defined(CONFIG_PCI_MSI) | |
679 | gops->xve.rearm_msi = xve_rearm_msi_gp106; | ||
680 | #endif | ||
671 | return 0; | 681 | return 0; |
672 | } | 682 | } |
diff --git a/drivers/gpu/nvgpu/include/nvgpu/hw/gp106/hw_xve_gp106.h b/drivers/gpu/nvgpu/include/nvgpu/hw/gp106/hw_xve_gp106.h index bfcb4883..c6e9a654 100644 --- a/drivers/gpu/nvgpu/include/nvgpu/hw/gp106/hw_xve_gp106.h +++ b/drivers/gpu/nvgpu/include/nvgpu/hw/gp106/hw_xve_gp106.h | |||
@@ -194,4 +194,9 @@ static inline u32 xve_reset_clock_counter_val_v(u32 r) | |||
194 | { | 194 | { |
195 | return (r >> 17) & 0x7ff; | 195 | return (r >> 17) & 0x7ff; |
196 | } | 196 | } |
197 | static inline u32 xve_cya_2_r(void) | ||
198 | { | ||
199 | return 0x00000704; | ||
200 | } | ||
201 | |||
197 | #endif | 202 | #endif |
diff --git a/drivers/gpu/nvgpu/pci.c b/drivers/gpu/nvgpu/pci.c index feb253b6..648fc60e 100644 --- a/drivers/gpu/nvgpu/pci.c +++ b/drivers/gpu/nvgpu/pci.c | |||
@@ -226,6 +226,12 @@ static irqreturn_t nvgpu_pci_isr(int irq, void *dev_id) | |||
226 | ret_stall = g->ops.mc.isr_stall(g); | 226 | ret_stall = g->ops.mc.isr_stall(g); |
227 | ret_nonstall = g->ops.mc.isr_nonstall(g); | 227 | ret_nonstall = g->ops.mc.isr_nonstall(g); |
228 | 228 | ||
229 | #if defined(CONFIG_PCI_MSI) | ||
230 | /* Send MSI EOI */ | ||
231 | if (g->ops.xve.rearm_msi && g->msi_enabled) | ||
232 | g->ops.xve.rearm_msi(g); | ||
233 | #endif | ||
234 | |||
229 | return (ret_stall == IRQ_NONE && ret_nonstall == IRQ_NONE) ? | 235 | return (ret_stall == IRQ_NONE && ret_nonstall == IRQ_NONE) ? |
230 | IRQ_NONE : IRQ_WAKE_THREAD; | 236 | IRQ_NONE : IRQ_WAKE_THREAD; |
231 | } | 237 | } |
@@ -361,6 +367,16 @@ static int nvgpu_pci_probe(struct pci_dev *pdev, | |||
361 | g->pci_class = (pdev->class >> 8) & 0xFFFFU; // we only want base/sub | 367 | g->pci_class = (pdev->class >> 8) & 0xFFFFU; // we only want base/sub |
362 | g->pci_revision = pdev->revision; | 368 | g->pci_revision = pdev->revision; |
363 | 369 | ||
370 | #if defined(CONFIG_PCI_MSI) | ||
371 | err = pci_enable_msi(pdev); | ||
372 | if (err) { | ||
373 | gk20a_err(&pdev->dev, | ||
374 | "MSI could not be enabled, falling back to legacy"); | ||
375 | g->msi_enabled = false; | ||
376 | } else | ||
377 | g->msi_enabled = true; | ||
378 | #endif | ||
379 | |||
364 | g->irq_stall = pdev->irq; | 380 | g->irq_stall = pdev->irq; |
365 | g->irq_nonstall = pdev->irq; | 381 | g->irq_nonstall = pdev->irq; |
366 | if (g->irq_stall < 0) | 382 | if (g->irq_stall < 0) |
@@ -370,6 +386,9 @@ static int nvgpu_pci_probe(struct pci_dev *pdev, | |||
370 | g->irq_stall, | 386 | g->irq_stall, |
371 | nvgpu_pci_isr, | 387 | nvgpu_pci_isr, |
372 | nvgpu_pci_intr_thread, | 388 | nvgpu_pci_intr_thread, |
389 | #if defined(CONFIG_PCI_MSI) | ||
390 | g->msi_enabled ? 0 : | ||
391 | #endif | ||
373 | IRQF_SHARED, "nvgpu", g); | 392 | IRQF_SHARED, "nvgpu", g); |
374 | if (err) { | 393 | if (err) { |
375 | gk20a_err(&pdev->dev, | 394 | gk20a_err(&pdev->dev, |
@@ -419,6 +438,13 @@ static void nvgpu_pci_remove(struct pci_dev *pdev) | |||
419 | 438 | ||
420 | disable_irq(g->irq_stall); | 439 | disable_irq(g->irq_stall); |
421 | devm_free_irq(&pdev->dev, g->irq_stall, g); | 440 | devm_free_irq(&pdev->dev, g->irq_stall, g); |
441 | |||
442 | #if defined(CONFIG_PCI_MSI) | ||
443 | if (g->msi_enabled) { | ||
444 | pci_disable_msi(pdev); | ||
445 | g->msi_enabled = false; | ||
446 | } | ||
447 | #endif | ||
422 | gk20a_dbg(gpu_dbg_shutdown, "IRQs disabled.\n"); | 448 | gk20a_dbg(gpu_dbg_shutdown, "IRQs disabled.\n"); |
423 | 449 | ||
424 | /* | 450 | /* |