diff options
-rw-r--r-- | drivers/gpu/nvgpu/gp106/acr_gp106.c | 6 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gp106/clk_gp106.c | 7 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gp106/fb_gp106.c | 4 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gp106/hal_gp106.c | 2 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gp106/pmu_gp106.c | 10 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gp106/regops_gp106.c | 3 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gp106/sec2_gp106.c | 6 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gp106/xve_gp106.c | 5 |
8 files changed, 12 insertions, 31 deletions
diff --git a/drivers/gpu/nvgpu/gp106/acr_gp106.c b/drivers/gpu/nvgpu/gp106/acr_gp106.c index 26c8ab53..da281077 100644 --- a/drivers/gpu/nvgpu/gp106/acr_gp106.c +++ b/drivers/gpu/nvgpu/gp106/acr_gp106.c | |||
@@ -11,12 +11,8 @@ | |||
11 | * more details. | 11 | * more details. |
12 | */ | 12 | */ |
13 | 13 | ||
14 | #include <linux/delay.h> /* for mdelay */ | ||
15 | #include <linux/firmware.h> | 14 | #include <linux/firmware.h> |
16 | #include <linux/module.h> | ||
17 | #include <linux/debugfs.h> | 15 | #include <linux/debugfs.h> |
18 | #include <linux/dma-mapping.h> | ||
19 | #include <linux/io.h> | ||
20 | 16 | ||
21 | #include <nvgpu/nvgpu_common.h> | 17 | #include <nvgpu/nvgpu_common.h> |
22 | #include <nvgpu/kmem.h> | 18 | #include <nvgpu/kmem.h> |
@@ -1163,7 +1159,7 @@ static int gp106_bootstrap_hs_flcn(struct gk20a *g) | |||
1163 | /* sec2 reset - to keep it idle */ | 1159 | /* sec2 reset - to keep it idle */ |
1164 | gk20a_writel(g, psec_falcon_engine_r(), | 1160 | gk20a_writel(g, psec_falcon_engine_r(), |
1165 | pwr_falcon_engine_reset_true_f()); | 1161 | pwr_falcon_engine_reset_true_f()); |
1166 | udelay(10); | 1162 | nvgpu_udelay(10); |
1167 | gk20a_writel(g, psec_falcon_engine_r(), | 1163 | gk20a_writel(g, psec_falcon_engine_r(), |
1168 | pwr_falcon_engine_reset_false_f()); | 1164 | pwr_falcon_engine_reset_false_f()); |
1169 | 1165 | ||
diff --git a/drivers/gpu/nvgpu/gp106/clk_gp106.c b/drivers/gpu/nvgpu/gp106/clk_gp106.c index 262fd63c..fb9406e5 100644 --- a/drivers/gpu/nvgpu/gp106/clk_gp106.c +++ b/drivers/gpu/nvgpu/gp106/clk_gp106.c | |||
@@ -16,11 +16,8 @@ | |||
16 | * along with this program. If not, see <http://www.gnu.org/licenses/>. | 16 | * along with this program. If not, see <http://www.gnu.org/licenses/>. |
17 | */ | 17 | */ |
18 | 18 | ||
19 | #include <linux/delay.h> /* for mdelay */ | ||
20 | #include <linux/module.h> | ||
21 | #include <linux/debugfs.h> | 19 | #include <linux/debugfs.h> |
22 | #include <linux/uaccess.h> | 20 | #include <linux/uaccess.h> |
23 | #include <soc/tegra/fuse.h> | ||
24 | 21 | ||
25 | #include <nvgpu/kmem.h> | 22 | #include <nvgpu/kmem.h> |
26 | 23 | ||
@@ -188,7 +185,7 @@ static u32 gp106_get_rate_cntr(struct gk20a *g, struct namemap_cfg *c) { | |||
188 | /* Wait for reset to happen */ | 185 | /* Wait for reset to happen */ |
189 | retries = CLK_DEFAULT_CNTRL_SETTLE_RETRIES; | 186 | retries = CLK_DEFAULT_CNTRL_SETTLE_RETRIES; |
190 | do { | 187 | do { |
191 | udelay(CLK_DEFAULT_CNTRL_SETTLE_USECS); | 188 | nvgpu_udelay(CLK_DEFAULT_CNTRL_SETTLE_USECS); |
192 | } while ((--retries) && (cntr = gk20a_readl(g, c->cntr.reg_cntr_addr))); | 189 | } while ((--retries) && (cntr = gk20a_readl(g, c->cntr.reg_cntr_addr))); |
193 | 190 | ||
194 | if (!retries) { | 191 | if (!retries) { |
@@ -206,7 +203,7 @@ static u32 gp106_get_rate_cntr(struct gk20a *g, struct namemap_cfg *c) { | |||
206 | c->cntr.reg_ctrl_idx); | 203 | c->cntr.reg_ctrl_idx); |
207 | gk20a_readl(g, c->cntr.reg_ctrl_addr); | 204 | gk20a_readl(g, c->cntr.reg_ctrl_addr); |
208 | 205 | ||
209 | udelay(XTAL_CNTR_DELAY); | 206 | nvgpu_udelay(XTAL_CNTR_DELAY); |
210 | 207 | ||
211 | cntr = XTAL_SCALE_TO_KHZ * gk20a_readl(g, c->cntr.reg_cntr_addr); | 208 | cntr = XTAL_SCALE_TO_KHZ * gk20a_readl(g, c->cntr.reg_cntr_addr); |
212 | 209 | ||
diff --git a/drivers/gpu/nvgpu/gp106/fb_gp106.c b/drivers/gpu/nvgpu/gp106/fb_gp106.c index b2e264cd..53f9af56 100644 --- a/drivers/gpu/nvgpu/gp106/fb_gp106.c +++ b/drivers/gpu/nvgpu/gp106/fb_gp106.c | |||
@@ -11,8 +11,6 @@ | |||
11 | * more details. | 11 | * more details. |
12 | */ | 12 | */ |
13 | 13 | ||
14 | #include <linux/delay.h> | ||
15 | |||
16 | #include "gk20a/gk20a.h" | 14 | #include "gk20a/gk20a.h" |
17 | #include "gp10b/fb_gp10b.h" | 15 | #include "gp10b/fb_gp10b.h" |
18 | 16 | ||
@@ -31,7 +29,7 @@ static void gp106_fb_reset(struct gk20a *g) | |||
31 | gk20a_dbg_fn("done"); | 29 | gk20a_dbg_fn("done"); |
32 | break; | 30 | break; |
33 | } | 31 | } |
34 | udelay(HW_SCRUB_TIMEOUT_DEFAULT); | 32 | nvgpu_udelay(HW_SCRUB_TIMEOUT_DEFAULT); |
35 | } while (--retries); | 33 | } while (--retries); |
36 | } | 34 | } |
37 | 35 | ||
diff --git a/drivers/gpu/nvgpu/gp106/hal_gp106.c b/drivers/gpu/nvgpu/gp106/hal_gp106.c index cdd1aade..7459c57f 100644 --- a/drivers/gpu/nvgpu/gp106/hal_gp106.c +++ b/drivers/gpu/nvgpu/gp106/hal_gp106.c | |||
@@ -13,8 +13,6 @@ | |||
13 | * more details. | 13 | * more details. |
14 | */ | 14 | */ |
15 | 15 | ||
16 | #include <linux/printk.h> | ||
17 | |||
18 | #include "gk20a/gk20a.h" | 16 | #include "gk20a/gk20a.h" |
19 | #include "gk20a/dbg_gpu_gk20a.h" | 17 | #include "gk20a/dbg_gpu_gk20a.h" |
20 | #include "gk20a/css_gr_gk20a.h" | 18 | #include "gk20a/css_gr_gk20a.h" |
diff --git a/drivers/gpu/nvgpu/gp106/pmu_gp106.c b/drivers/gpu/nvgpu/gp106/pmu_gp106.c index 308bcf04..e0114979 100644 --- a/drivers/gpu/nvgpu/gp106/pmu_gp106.c +++ b/drivers/gpu/nvgpu/gp106/pmu_gp106.c | |||
@@ -11,8 +11,6 @@ | |||
11 | * more details. | 11 | * more details. |
12 | */ | 12 | */ |
13 | 13 | ||
14 | #include <linux/delay.h> /* for udelay */ | ||
15 | |||
16 | #include "gk20a/gk20a.h" | 14 | #include "gk20a/gk20a.h" |
17 | #include "gk20a/pmu_gk20a.h" | 15 | #include "gk20a/pmu_gk20a.h" |
18 | 16 | ||
@@ -70,7 +68,7 @@ static int gp106_pmu_enable_hw(struct pmu_gk20a *pmu, bool enable) | |||
70 | gk20a_dbg_fn("done"); | 68 | gk20a_dbg_fn("done"); |
71 | return 0; | 69 | return 0; |
72 | } | 70 | } |
73 | udelay(PMU_MEM_SCRUBBING_TIMEOUT_DEFAULT); | 71 | nvgpu_udelay(PMU_MEM_SCRUBBING_TIMEOUT_DEFAULT); |
74 | } while (--retries); | 72 | } while (--retries); |
75 | 73 | ||
76 | /* If scrubbing timeout, keep PMU in reset state */ | 74 | /* If scrubbing timeout, keep PMU in reset state */ |
@@ -103,7 +101,7 @@ static int pmu_enable(struct pmu_gk20a *pmu, bool enable) | |||
103 | 101 | ||
104 | pmu_enable_irq(pmu, false); | 102 | pmu_enable_irq(pmu, false); |
105 | gp106_pmu_enable_hw(pmu, false); | 103 | gp106_pmu_enable_hw(pmu, false); |
106 | udelay(10); | 104 | nvgpu_udelay(10); |
107 | } | 105 | } |
108 | } else { | 106 | } else { |
109 | gp106_pmu_enable_hw(pmu, true); | 107 | gp106_pmu_enable_hw(pmu, true); |
@@ -113,7 +111,7 @@ static int pmu_enable(struct pmu_gk20a *pmu, bool enable) | |||
113 | err = pmu_idle(pmu); | 111 | err = pmu_idle(pmu); |
114 | if (err) | 112 | if (err) |
115 | return err; | 113 | return err; |
116 | udelay(5); | 114 | nvgpu_udelay(5); |
117 | pmu_enable_irq(pmu, true); | 115 | pmu_enable_irq(pmu, true); |
118 | } | 116 | } |
119 | 117 | ||
@@ -155,7 +153,7 @@ static int gp106_sec2_reset(struct gk20a *g) | |||
155 | //sec2 reset | 153 | //sec2 reset |
156 | gk20a_writel(g, psec_falcon_engine_r(), | 154 | gk20a_writel(g, psec_falcon_engine_r(), |
157 | pwr_falcon_engine_reset_true_f()); | 155 | pwr_falcon_engine_reset_true_f()); |
158 | udelay(10); | 156 | nvgpu_udelay(10); |
159 | gk20a_writel(g, psec_falcon_engine_r(), | 157 | gk20a_writel(g, psec_falcon_engine_r(), |
160 | pwr_falcon_engine_reset_false_f()); | 158 | pwr_falcon_engine_reset_false_f()); |
161 | 159 | ||
diff --git a/drivers/gpu/nvgpu/gp106/regops_gp106.c b/drivers/gpu/nvgpu/gp106/regops_gp106.c index 0d90977d..a165c426 100644 --- a/drivers/gpu/nvgpu/gp106/regops_gp106.c +++ b/drivers/gpu/nvgpu/gp106/regops_gp106.c | |||
@@ -16,9 +16,6 @@ | |||
16 | * along with this program. If not, see <http://www.gnu.org/licenses/>. | 16 | * along with this program. If not, see <http://www.gnu.org/licenses/>. |
17 | */ | 17 | */ |
18 | 18 | ||
19 | #include <linux/err.h> | ||
20 | #include <uapi/linux/nvgpu.h> | ||
21 | |||
22 | #include "gk20a/gk20a.h" | 19 | #include "gk20a/gk20a.h" |
23 | #include "gk20a/dbg_gpu_gk20a.h" | 20 | #include "gk20a/dbg_gpu_gk20a.h" |
24 | #include "gk20a/regops_gk20a.h" | 21 | #include "gk20a/regops_gk20a.h" |
diff --git a/drivers/gpu/nvgpu/gp106/sec2_gp106.c b/drivers/gpu/nvgpu/gp106/sec2_gp106.c index cc1e91f6..078a1436 100644 --- a/drivers/gpu/nvgpu/gp106/sec2_gp106.c +++ b/drivers/gpu/nvgpu/gp106/sec2_gp106.c | |||
@@ -11,8 +11,6 @@ | |||
11 | * more details. | 11 | * more details. |
12 | */ | 12 | */ |
13 | 13 | ||
14 | #include <linux/delay.h> /* for udelay */ | ||
15 | |||
16 | #include "gk20a/gk20a.h" | 14 | #include "gk20a/gk20a.h" |
17 | #include "gk20a/pmu_gk20a.h" | 15 | #include "gk20a/pmu_gk20a.h" |
18 | 16 | ||
@@ -46,7 +44,7 @@ int sec2_clear_halt_interrupt_status(struct gk20a *g, unsigned int timeout) | |||
46 | psec_falcon_irqstat_halt_true_f()) | 44 | psec_falcon_irqstat_halt_true_f()) |
47 | /*halt irq is clear*/ | 45 | /*halt irq is clear*/ |
48 | break; | 46 | break; |
49 | udelay(1); | 47 | nvgpu_udelay(1); |
50 | } while (!nvgpu_timeout_expired(&to)); | 48 | } while (!nvgpu_timeout_expired(&to)); |
51 | 49 | ||
52 | if (nvgpu_timeout_peek_expired(&to)) | 50 | if (nvgpu_timeout_peek_expired(&to)) |
@@ -68,7 +66,7 @@ int sec2_wait_for_halt(struct gk20a *g, unsigned int timeout) | |||
68 | completion = 0; | 66 | completion = 0; |
69 | break; | 67 | break; |
70 | } | 68 | } |
71 | udelay(1); | 69 | nvgpu_udelay(1); |
72 | } while (!nvgpu_timeout_expired(&to)); | 70 | } while (!nvgpu_timeout_expired(&to)); |
73 | 71 | ||
74 | if (completion) { | 72 | if (completion) { |
diff --git a/drivers/gpu/nvgpu/gp106/xve_gp106.c b/drivers/gpu/nvgpu/gp106/xve_gp106.c index e4582e15..a5834174 100644 --- a/drivers/gpu/nvgpu/gp106/xve_gp106.c +++ b/drivers/gpu/nvgpu/gp106/xve_gp106.c | |||
@@ -14,7 +14,6 @@ | |||
14 | * along with this program. If not, see <http://www.gnu.org/licenses/>. | 14 | * along with this program. If not, see <http://www.gnu.org/licenses/>. |
15 | */ | 15 | */ |
16 | 16 | ||
17 | #include <linux/delay.h> | ||
18 | #include <linux/debugfs.h> | 17 | #include <linux/debugfs.h> |
19 | #include <linux/uaccess.h> | 18 | #include <linux/uaccess.h> |
20 | 19 | ||
@@ -92,7 +91,7 @@ static void xve_reset_gpu_gp106(struct gk20a *g) | |||
92 | /* | 91 | /* |
93 | * Don't access GPU until _after_ it's back out of reset! | 92 | * Don't access GPU until _after_ it's back out of reset! |
94 | */ | 93 | */ |
95 | msleep(100); | 94 | nvgpu_msleep(100); |
96 | g->ops.xve.xve_writel(g, xve_reset_r(), 0); | 95 | g->ops.xve.xve_writel(g, xve_reset_r(), 0); |
97 | } | 96 | } |
98 | 97 | ||
@@ -530,7 +529,7 @@ static ssize_t xve_link_speed_write(struct file *filp, | |||
530 | return -EINVAL; | 529 | return -EINVAL; |
531 | 530 | ||
532 | /* Brief pause... To help rate limit this. */ | 531 | /* Brief pause... To help rate limit this. */ |
533 | msleep(250); | 532 | nvgpu_msleep(250); |
534 | 533 | ||
535 | /* | 534 | /* |
536 | * And actually set the speed. Yay. | 535 | * And actually set the speed. Yay. |