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-rw-r--r--drivers/gpu/nvgpu/Makefile.nvgpu1
-rw-r--r--drivers/gpu/nvgpu/common/enabled.c48
-rw-r--r--drivers/gpu/nvgpu/common/linux/module.c11
-rw-r--r--drivers/gpu/nvgpu/common/linux/pci.c11
-rw-r--r--drivers/gpu/nvgpu/common/mm/gmmu.c3
-rw-r--r--drivers/gpu/nvgpu/gk20a/channel_gk20a.c5
-rw-r--r--drivers/gpu/nvgpu/gk20a/gk20a.c7
-rw-r--r--drivers/gpu/nvgpu/gk20a/gk20a.h12
-rw-r--r--drivers/gpu/nvgpu/gk20a/gr_ctx_gk20a.c3
-rw-r--r--drivers/gpu/nvgpu/gk20a/gr_gk20a.c9
-rw-r--r--drivers/gpu/nvgpu/gk20a/ltc_common.c3
-rw-r--r--drivers/gpu/nvgpu/gk20a/ltc_gk20a.c3
-rw-r--r--drivers/gpu/nvgpu/gk20a/mm_gk20a.c7
-rw-r--r--drivers/gpu/nvgpu/gk20a/priv_ring_gk20a.c5
-rw-r--r--drivers/gpu/nvgpu/gk20a/therm_gk20a.c4
-rw-r--r--drivers/gpu/nvgpu/gm20b/gr_gm20b.c3
-rw-r--r--drivers/gpu/nvgpu/gm20b/hal_gm20b.c5
-rw-r--r--drivers/gpu/nvgpu/gm20b/ltc_gm20b.c3
-rw-r--r--drivers/gpu/nvgpu/gp10b/hal_gp10b.c5
-rw-r--r--drivers/gpu/nvgpu/gp10b/ltc_gp10b.c3
-rw-r--r--drivers/gpu/nvgpu/gp10b/priv_ring_gp10b.c3
-rw-r--r--drivers/gpu/nvgpu/include/nvgpu/enabled.h60
-rw-r--r--drivers/gpu/nvgpu/tegra/linux/platform_gk20a_tegra.c9
-rw-r--r--drivers/gpu/nvgpu/tegra/linux/platform_gp10b_tegra.c3
-rw-r--r--drivers/gpu/nvgpu/vgpu/vgpu.c13
25 files changed, 194 insertions, 45 deletions
diff --git a/drivers/gpu/nvgpu/Makefile.nvgpu b/drivers/gpu/nvgpu/Makefile.nvgpu
index e21a9426..e7ea3c5d 100644
--- a/drivers/gpu/nvgpu/Makefile.nvgpu
+++ b/drivers/gpu/nvgpu/Makefile.nvgpu
@@ -51,6 +51,7 @@ nvgpu-y := \
51 common/mm/gmmu.o \ 51 common/mm/gmmu.o \
52 common/mm/vm.o \ 52 common/mm/vm.o \
53 common/mm/vm_area.o \ 53 common/mm/vm_area.o \
54 common/enabled.o \
54 common/pramin.o \ 55 common/pramin.o \
55 common/semaphore.o \ 56 common/semaphore.o \
56 common/as.o \ 57 common/as.o \
diff --git a/drivers/gpu/nvgpu/common/enabled.c b/drivers/gpu/nvgpu/common/enabled.c
new file mode 100644
index 00000000..d56f0551
--- /dev/null
+++ b/drivers/gpu/nvgpu/common/enabled.c
@@ -0,0 +1,48 @@
1/*
2 * Copyright (c) 2017, NVIDIA CORPORATION. All rights reserved.
3 *
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms and conditions of the GNU General Public License,
6 * version 2, as published by the Free Software Foundation.
7 *
8 * This program is distributed in the hope it will be useful, but WITHOUT
9 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
10 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
11 * more details.
12 *
13 * You should have received a copy of the GNU General Public License
14 * along with this program. If not, see <http://www.gnu.org/licenses/>.
15 */
16
17#include <nvgpu/enabled.h>
18#include <nvgpu/bitops.h>
19
20#include "gk20a/gk20a.h"
21
22int nvgpu_init_enabled_flags(struct gk20a *g)
23{
24 /*
25 * Zero all flags initially. Flags that should be set to non-zero states
26 * can be done so during driver init.
27 */
28 g->enabled_flags = nvgpu_kzalloc(g,
29 BITS_TO_LONGS(NVGPU_MAX_ENABLED_BITS) *
30 sizeof(unsigned long));
31 if (!g->enabled_flags)
32 return -ENOMEM;
33
34 return 0;
35}
36
37bool nvgpu_is_enabled(struct gk20a *g, int flag)
38{
39 return test_bit(flag, g->enabled_flags);
40}
41
42bool __nvgpu_set_enabled(struct gk20a *g, int flag, bool state)
43{
44 if (state)
45 return test_and_set_bit(flag, g->enabled_flags);
46 else
47 return test_and_clear_bit(flag, g->enabled_flags);
48}
diff --git a/drivers/gpu/nvgpu/common/linux/module.c b/drivers/gpu/nvgpu/common/linux/module.c
index adf9ff37..d5fc40de 100644
--- a/drivers/gpu/nvgpu/common/linux/module.c
+++ b/drivers/gpu/nvgpu/common/linux/module.c
@@ -28,6 +28,7 @@
28#include <nvgpu/kmem.h> 28#include <nvgpu/kmem.h>
29#include <nvgpu/nvgpu_common.h> 29#include <nvgpu/nvgpu_common.h>
30#include <nvgpu/soc.h> 30#include <nvgpu/soc.h>
31#include <nvgpu/enabled.h>
31 32
32#include "gk20a/gk20a.h" 33#include "gk20a/gk20a.h"
33#include "gk20a/platform_gk20a.h" 34#include "gk20a/platform_gk20a.h"
@@ -873,11 +874,15 @@ static int gk20a_probe(struct platform_device *dev)
873 set_gk20a(dev, gk20a); 874 set_gk20a(dev, gk20a);
874 gk20a->dev = &dev->dev; 875 gk20a->dev = &dev->dev;
875 876
876 if (nvgpu_platform_is_simulation(gk20a))
877 gk20a->is_fmodel = true;
878
879 nvgpu_kmem_init(gk20a); 877 nvgpu_kmem_init(gk20a);
880 878
879 err = nvgpu_init_enabled_flags(gk20a);
880 if (err)
881 return err;
882
883 if (nvgpu_platform_is_simulation(gk20a))
884 __nvgpu_set_enabled(gk20a, NVGPU_IS_FMODEL, true);
885
881 gk20a->irq_stall = platform_get_irq(dev, 0); 886 gk20a->irq_stall = platform_get_irq(dev, 0);
882 gk20a->irq_nonstall = platform_get_irq(dev, 1); 887 gk20a->irq_nonstall = platform_get_irq(dev, 1);
883 if (gk20a->irq_stall < 0 || gk20a->irq_nonstall < 0) 888 if (gk20a->irq_stall < 0 || gk20a->irq_nonstall < 0)
diff --git a/drivers/gpu/nvgpu/common/linux/pci.c b/drivers/gpu/nvgpu/common/linux/pci.c
index 767e9d47..0a5095fe 100644
--- a/drivers/gpu/nvgpu/common/linux/pci.c
+++ b/drivers/gpu/nvgpu/common/linux/pci.c
@@ -20,6 +20,7 @@
20 20
21#include <nvgpu/nvgpu_common.h> 21#include <nvgpu/nvgpu_common.h>
22#include <nvgpu/kmem.h> 22#include <nvgpu/kmem.h>
23#include <nvgpu/enabled.h>
23 24
24#include "gk20a/gk20a.h" 25#include "gk20a/gk20a.h"
25#include "gk20a/platform_gk20a.h" 26#include "gk20a/platform_gk20a.h"
@@ -358,11 +359,17 @@ static int nvgpu_pci_probe(struct pci_dev *pdev,
358 return -ENOMEM; 359 return -ENOMEM;
359 } 360 }
360 361
362 nvgpu_kmem_init(g);
363
364 err = nvgpu_init_enabled_flags(g);
365 if (err) {
366 kfree(g);
367 return err;
368 }
369
361 platform->g = g; 370 platform->g = g;
362 g->dev = &pdev->dev; 371 g->dev = &pdev->dev;
363 372
364 nvgpu_kmem_init(g);
365
366 err = pci_enable_device(pdev); 373 err = pci_enable_device(pdev);
367 if (err) 374 if (err)
368 return err; 375 return err;
diff --git a/drivers/gpu/nvgpu/common/mm/gmmu.c b/drivers/gpu/nvgpu/common/mm/gmmu.c
index 695347bc..dc91cc2f 100644
--- a/drivers/gpu/nvgpu/common/mm/gmmu.c
+++ b/drivers/gpu/nvgpu/common/mm/gmmu.c
@@ -18,6 +18,7 @@
18#include <nvgpu/dma.h> 18#include <nvgpu/dma.h>
19#include <nvgpu/gmmu.h> 19#include <nvgpu/gmmu.h>
20#include <nvgpu/nvgpu_mem.h> 20#include <nvgpu/nvgpu_mem.h>
21#include <nvgpu/enabled.h>
21 22
22#include "gk20a/gk20a.h" 23#include "gk20a/gk20a.h"
23#include "gk20a/mm_gk20a.h" 24#include "gk20a/mm_gk20a.h"
@@ -74,7 +75,7 @@ static int nvgpu_alloc_gmmu_pages(struct vm_gk20a *vm, u32 order,
74 u32 len = num_pages * PAGE_SIZE; 75 u32 len = num_pages * PAGE_SIZE;
75 int err; 76 int err;
76 77
77 if (g->is_fmodel) 78 if (nvgpu_is_enabled(g, NVGPU_IS_FMODEL))
78 return alloc_gmmu_phys_pages(vm, order, entry); 79 return alloc_gmmu_phys_pages(vm, order, entry);
79 80
80 /* 81 /*
diff --git a/drivers/gpu/nvgpu/gk20a/channel_gk20a.c b/drivers/gpu/nvgpu/gk20a/channel_gk20a.c
index 936e4d04..571570d8 100644
--- a/drivers/gpu/nvgpu/gk20a/channel_gk20a.c
+++ b/drivers/gpu/nvgpu/gk20a/channel_gk20a.c
@@ -29,6 +29,7 @@
29#include <nvgpu/list.h> 29#include <nvgpu/list.h>
30#include <nvgpu/circ_buf.h> 30#include <nvgpu/circ_buf.h>
31#include <nvgpu/cond.h> 31#include <nvgpu/cond.h>
32#include <nvgpu/enabled.h>
32 33
33#include "gk20a.h" 34#include "gk20a.h"
34#include "debug_gk20a.h" 35#include "debug_gk20a.h"
@@ -126,7 +127,7 @@ static void free_channel(struct fifo_gk20a *f,
126 * On teardown it is not possible to dereference platform, but ignoring 127 * On teardown it is not possible to dereference platform, but ignoring
127 * this is fine then because no new channels would be created. 128 * this is fine then because no new channels would be created.
128 */ 129 */
129 if (!g->driver_is_dying) { 130 if (!nvgpu_is_enabled(g, NVGPU_DRIVER_IS_DYING)) {
130 if (g->aggressive_sync_destroy_thresh && 131 if (g->aggressive_sync_destroy_thresh &&
131 (f->used_channels < 132 (f->used_channels <
132 g->aggressive_sync_destroy_thresh)) 133 g->aggressive_sync_destroy_thresh))
@@ -2418,7 +2419,7 @@ int gk20a_submit_channel_gpfifo(struct channel_gk20a *c,
2418 struct nvgpu_gpfifo __user *user_gpfifo = args ? 2419 struct nvgpu_gpfifo __user *user_gpfifo = args ?
2419 (struct nvgpu_gpfifo __user *)(uintptr_t)args->gpfifo : NULL; 2420 (struct nvgpu_gpfifo __user *)(uintptr_t)args->gpfifo : NULL;
2420 2421
2421 if (g->driver_is_dying) 2422 if (nvgpu_is_enabled(g, NVGPU_DRIVER_IS_DYING))
2422 return -ENODEV; 2423 return -ENODEV;
2423 2424
2424 if (c->has_timedout) 2425 if (c->has_timedout)
diff --git a/drivers/gpu/nvgpu/gk20a/gk20a.c b/drivers/gpu/nvgpu/gk20a/gk20a.c
index f4e7fe45..31b0a771 100644
--- a/drivers/gpu/nvgpu/gk20a/gk20a.c
+++ b/drivers/gpu/nvgpu/gk20a/gk20a.c
@@ -23,6 +23,7 @@
23#include <nvgpu/allocator.h> 23#include <nvgpu/allocator.h>
24#include <nvgpu/timers.h> 24#include <nvgpu/timers.h>
25#include <nvgpu/soc.h> 25#include <nvgpu/soc.h>
26#include <nvgpu/enabled.h>
26 27
27#include <trace/events/gk20a.h> 28#include <trace/events/gk20a.h>
28 29
@@ -364,20 +365,20 @@ done:
364 */ 365 */
365int gk20a_can_busy(struct gk20a *g) 366int gk20a_can_busy(struct gk20a *g)
366{ 367{
367 if (g->driver_is_dying) 368 if (nvgpu_is_enabled(g, NVGPU_DRIVER_IS_DYING))
368 return 0; 369 return 0;
369 return 1; 370 return 1;
370} 371}
371 372
372/* 373/*
373 * Start the process for unloading the driver. Set g->driver_is_dying. 374 * Start the process for unloading the driver. Set NVGPU_DRIVER_IS_DYING.
374 */ 375 */
375void gk20a_driver_start_unload(struct gk20a *g) 376void gk20a_driver_start_unload(struct gk20a *g)
376{ 377{
377 gk20a_dbg(gpu_dbg_shutdown, "Driver is now going down!\n"); 378 gk20a_dbg(gpu_dbg_shutdown, "Driver is now going down!\n");
378 379
379 down_write(&g->busy_lock); 380 down_write(&g->busy_lock);
380 g->driver_is_dying = 1; 381 __nvgpu_set_enabled(g, NVGPU_DRIVER_IS_DYING, true);
381 up_write(&g->busy_lock); 382 up_write(&g->busy_lock);
382 383
383 if (g->is_virtual) 384 if (g->is_virtual)
diff --git a/drivers/gpu/nvgpu/gk20a/gk20a.h b/drivers/gpu/nvgpu/gk20a/gk20a.h
index 10417084..689fafb1 100644
--- a/drivers/gpu/nvgpu/gk20a/gk20a.h
+++ b/drivers/gpu/nvgpu/gk20a/gk20a.h
@@ -1,8 +1,8 @@
1/* 1/*
2 * GK20A Graphics
3 *
4 * Copyright (c) 2011-2017, NVIDIA CORPORATION. All rights reserved. 2 * Copyright (c) 2011-2017, NVIDIA CORPORATION. All rights reserved.
5 * 3 *
4 * GK20A Graphics
5 *
6 * This program is free software; you can redistribute it and/or modify it 6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms and conditions of the GNU General Public License, 7 * under the terms and conditions of the GNU General Public License,
8 * version 2, as published by the Free Software Foundation. 8 * version 2, as published by the Free Software Foundation.
@@ -971,15 +971,17 @@ struct gk20a {
971 struct device *dev; 971 struct device *dev;
972 struct platform_device *host1x_dev; 972 struct platform_device *host1x_dev;
973 973
974 /*
975 * Used by <nvgpu/enabled.h>. Do not access directly!
976 */
977 unsigned long *enabled_flags;
978
974 atomic_t usage_count; 979 atomic_t usage_count;
975 int driver_is_dying;
976 980
977 atomic_t nonstall_ops; 981 atomic_t nonstall_ops;
978 struct work_struct nonstall_fn_work; 982 struct work_struct nonstall_fn_work;
979 struct workqueue_struct *nonstall_work_queue; 983 struct workqueue_struct *nonstall_work_queue;
980 984
981 bool is_fmodel;
982
983 struct kref refcount; 985 struct kref refcount;
984 986
985 struct resource *reg_mem; 987 struct resource *reg_mem;
diff --git a/drivers/gpu/nvgpu/gk20a/gr_ctx_gk20a.c b/drivers/gpu/nvgpu/gk20a/gr_ctx_gk20a.c
index 32c95e2f..b0a90fc8 100644
--- a/drivers/gpu/nvgpu/gk20a/gr_ctx_gk20a.c
+++ b/drivers/gpu/nvgpu/gk20a/gr_ctx_gk20a.c
@@ -23,6 +23,7 @@
23#include <nvgpu/kmem.h> 23#include <nvgpu/kmem.h>
24#include <nvgpu/log.h> 24#include <nvgpu/log.h>
25#include <nvgpu/firmware.h> 25#include <nvgpu/firmware.h>
26#include <nvgpu/enabled.h>
26 27
27#include "gk20a.h" 28#include "gk20a.h"
28#include "gr_ctx_gk20a.h" 29#include "gr_ctx_gk20a.h"
@@ -442,7 +443,7 @@ done:
442 443
443int gr_gk20a_init_ctx_vars(struct gk20a *g, struct gr_gk20a *gr) 444int gr_gk20a_init_ctx_vars(struct gk20a *g, struct gr_gk20a *gr)
444{ 445{
445 if (g->is_fmodel) 446 if (nvgpu_is_enabled(g, NVGPU_IS_FMODEL))
446 return gr_gk20a_init_ctx_vars_sim(g, gr); 447 return gr_gk20a_init_ctx_vars_sim(g, gr);
447 else 448 else
448 return gr_gk20a_init_ctx_vars_fw(g, gr); 449 return gr_gk20a_init_ctx_vars_fw(g, gr);
diff --git a/drivers/gpu/nvgpu/gk20a/gr_gk20a.c b/drivers/gpu/nvgpu/gk20a/gr_gk20a.c
index 2b5d809f..c12f49ac 100644
--- a/drivers/gpu/nvgpu/gk20a/gr_gk20a.c
+++ b/drivers/gpu/nvgpu/gk20a/gr_gk20a.c
@@ -29,6 +29,7 @@
29#include <nvgpu/sort.h> 29#include <nvgpu/sort.h>
30#include <nvgpu/bug.h> 30#include <nvgpu/bug.h>
31#include <nvgpu/firmware.h> 31#include <nvgpu/firmware.h>
32#include <nvgpu/enabled.h>
32 33
33#include "gk20a.h" 34#include "gk20a.h"
34#include "kind_gk20a.h" 35#include "kind_gk20a.h"
@@ -386,7 +387,7 @@ int gr_gk20a_wait_fe_idle(struct gk20a *g, unsigned long duration_ms,
386 u32 delay = expect_delay; 387 u32 delay = expect_delay;
387 struct nvgpu_timeout timeout; 388 struct nvgpu_timeout timeout;
388 389
389 if (g->is_fmodel) 390 if (nvgpu_is_enabled(g, NVGPU_IS_FMODEL))
390 return 0; 391 return 0;
391 392
392 gk20a_dbg_fn(""); 393 gk20a_dbg_fn("");
@@ -1597,7 +1598,7 @@ static int gr_gk20a_init_golden_ctx_image(struct gk20a *g,
1597 if (gr->ctx_vars.golden_image_initialized) { 1598 if (gr->ctx_vars.golden_image_initialized) {
1598 goto clean_up; 1599 goto clean_up;
1599 } 1600 }
1600 if (!g->is_fmodel) { 1601 if (!nvgpu_is_enabled(g, NVGPU_IS_FMODEL)) {
1601 struct nvgpu_timeout timeout; 1602 struct nvgpu_timeout timeout;
1602 1603
1603 nvgpu_timeout_init(g, &timeout, 1604 nvgpu_timeout_init(g, &timeout,
@@ -1642,7 +1643,7 @@ static int gr_gk20a_init_golden_ctx_image(struct gk20a *g,
1642 gk20a_readl(g, gr_fecs_ctxsw_reset_ctl_r()); 1643 gk20a_readl(g, gr_fecs_ctxsw_reset_ctl_r());
1643 nvgpu_udelay(10); 1644 nvgpu_udelay(10);
1644 1645
1645 if (!g->is_fmodel) { 1646 if (!nvgpu_is_enabled(g, NVGPU_IS_FMODEL)) {
1646 struct nvgpu_timeout timeout; 1647 struct nvgpu_timeout timeout;
1647 1648
1648 nvgpu_timeout_init(g, &timeout, 1649 nvgpu_timeout_init(g, &timeout,
@@ -2582,7 +2583,7 @@ int gr_gk20a_load_ctxsw_ucode(struct gk20a *g)
2582 2583
2583 gk20a_dbg_fn(""); 2584 gk20a_dbg_fn("");
2584 2585
2585 if (g->is_fmodel) { 2586 if (nvgpu_is_enabled(g, NVGPU_IS_FMODEL)) {
2586 gk20a_writel(g, gr_fecs_ctxsw_mailbox_r(7), 2587 gk20a_writel(g, gr_fecs_ctxsw_mailbox_r(7),
2587 gr_fecs_ctxsw_mailbox_value_f(0xc0de7777)); 2588 gr_fecs_ctxsw_mailbox_value_f(0xc0de7777));
2588 gk20a_writel(g, gr_gpccs_ctxsw_mailbox_r(7), 2589 gk20a_writel(g, gr_gpccs_ctxsw_mailbox_r(7),
diff --git a/drivers/gpu/nvgpu/gk20a/ltc_common.c b/drivers/gpu/nvgpu/gk20a/ltc_common.c
index 1958c11c..2b015fa0 100644
--- a/drivers/gpu/nvgpu/gk20a/ltc_common.c
+++ b/drivers/gpu/nvgpu/gk20a/ltc_common.c
@@ -19,6 +19,7 @@
19 */ 19 */
20 20
21#include <nvgpu/dma.h> 21#include <nvgpu/dma.h>
22#include <nvgpu/enabled.h>
22 23
23#include "gk20a.h" 24#include "gk20a.h"
24#include "gr_gk20a.h" 25#include "gr_gk20a.h"
@@ -92,7 +93,7 @@ static void gk20a_ltc_init_cbc(struct gk20a *g, struct gr_gk20a *gr)
92 u64 compbit_store_iova; 93 u64 compbit_store_iova;
93 u64 compbit_base_post_divide64; 94 u64 compbit_base_post_divide64;
94 95
95 if (g->is_fmodel) 96 if (nvgpu_is_enabled(g, NVGPU_IS_FMODEL))
96 compbit_store_iova = gk20a_mem_phys(&gr->compbit_store.mem); 97 compbit_store_iova = gk20a_mem_phys(&gr->compbit_store.mem);
97 else 98 else
98 compbit_store_iova = g->ops.mm.get_iova_addr(g, 99 compbit_store_iova = g->ops.mm.get_iova_addr(g,
diff --git a/drivers/gpu/nvgpu/gk20a/ltc_gk20a.c b/drivers/gpu/nvgpu/gk20a/ltc_gk20a.c
index 23576ce0..8867202f 100644
--- a/drivers/gpu/nvgpu/gk20a/ltc_gk20a.c
+++ b/drivers/gpu/nvgpu/gk20a/ltc_gk20a.c
@@ -20,6 +20,7 @@
20#include <nvgpu/timers.h> 20#include <nvgpu/timers.h>
21#include <nvgpu/log.h> 21#include <nvgpu/log.h>
22#include <nvgpu/bug.h> 22#include <nvgpu/bug.h>
23#include <nvgpu/enabled.h>
23 24
24#include "gk20a.h" 25#include "gk20a.h"
25#include "ltc_gk20a.h" 26#include "ltc_gk20a.h"
@@ -83,7 +84,7 @@ static int gk20a_ltc_init_comptags(struct gk20a *g, struct gr_gk20a *gr)
83 gk20a_dbg_info("max comptag lines : %d", 84 gk20a_dbg_info("max comptag lines : %d",
84 max_comptag_lines); 85 max_comptag_lines);
85 86
86 if (g->is_fmodel) 87 if (nvgpu_is_enabled(g, NVGPU_IS_FMODEL))
87 err = gk20a_ltc_alloc_phys_cbc(g, compbit_backing_size); 88 err = gk20a_ltc_alloc_phys_cbc(g, compbit_backing_size);
88 else 89 else
89 err = gk20a_ltc_alloc_virt_cbc(g, compbit_backing_size); 90 err = gk20a_ltc_alloc_virt_cbc(g, compbit_backing_size);
diff --git a/drivers/gpu/nvgpu/gk20a/mm_gk20a.c b/drivers/gpu/nvgpu/gk20a/mm_gk20a.c
index 17fa0c17..786a6693 100644
--- a/drivers/gpu/nvgpu/gk20a/mm_gk20a.c
+++ b/drivers/gpu/nvgpu/gk20a/mm_gk20a.c
@@ -39,6 +39,7 @@
39#include <nvgpu/log.h> 39#include <nvgpu/log.h>
40#include <nvgpu/bug.h> 40#include <nvgpu/bug.h>
41#include <nvgpu/log2.h> 41#include <nvgpu/log2.h>
42#include <nvgpu/enabled.h>
42 43
43#include <nvgpu/linux/dma.h> 44#include <nvgpu/linux/dma.h>
44 45
@@ -824,7 +825,7 @@ void free_gmmu_pages(struct vm_gk20a *vm,
824 if (entry->woffset) /* fake shadow mem */ 825 if (entry->woffset) /* fake shadow mem */
825 return; 826 return;
826 827
827 if (g->is_fmodel) { 828 if (nvgpu_is_enabled(g, NVGPU_IS_FMODEL)) {
828 free_gmmu_phys_pages(vm, entry); 829 free_gmmu_phys_pages(vm, entry);
829 return; 830 return;
830 } 831 }
@@ -836,7 +837,7 @@ int map_gmmu_pages(struct gk20a *g, struct gk20a_mm_entry *entry)
836{ 837{
837 gk20a_dbg_fn(""); 838 gk20a_dbg_fn("");
838 839
839 if (g->is_fmodel) 840 if (nvgpu_is_enabled(g, NVGPU_IS_FMODEL))
840 return map_gmmu_phys_pages(entry); 841 return map_gmmu_phys_pages(entry);
841 842
842 if (IS_ENABLED(CONFIG_ARM64)) { 843 if (IS_ENABLED(CONFIG_ARM64)) {
@@ -860,7 +861,7 @@ void unmap_gmmu_pages(struct gk20a *g, struct gk20a_mm_entry *entry)
860{ 861{
861 gk20a_dbg_fn(""); 862 gk20a_dbg_fn("");
862 863
863 if (g->is_fmodel) { 864 if (nvgpu_is_enabled(g, NVGPU_IS_FMODEL)) {
864 unmap_gmmu_phys_pages(entry); 865 unmap_gmmu_phys_pages(entry);
865 return; 866 return;
866 } 867 }
diff --git a/drivers/gpu/nvgpu/gk20a/priv_ring_gk20a.c b/drivers/gpu/nvgpu/gk20a/priv_ring_gk20a.c
index 2f837bfc..dbab6b4b 100644
--- a/drivers/gpu/nvgpu/gk20a/priv_ring_gk20a.c
+++ b/drivers/gpu/nvgpu/gk20a/priv_ring_gk20a.c
@@ -20,6 +20,7 @@
20 20
21#include <nvgpu/log.h> 21#include <nvgpu/log.h>
22#include <nvgpu/timers.h> 22#include <nvgpu/timers.h>
23#include <nvgpu/enabled.h>
23 24
24#include <nvgpu/hw/gk20a/hw_mc_gk20a.h> 25#include <nvgpu/hw/gk20a/hw_mc_gk20a.h>
25#include <nvgpu/hw/gk20a/hw_pri_ringmaster_gk20a.h> 26#include <nvgpu/hw/gk20a/hw_pri_ringmaster_gk20a.h>
@@ -28,7 +29,7 @@
28 29
29void gk20a_enable_priv_ring(struct gk20a *g) 30void gk20a_enable_priv_ring(struct gk20a *g)
30{ 31{
31 if (g->is_fmodel) 32 if (nvgpu_is_enabled(g, NVGPU_IS_FMODEL))
32 return; 33 return;
33 34
34 if (g->ops.clock_gating.slcg_priring_load_gating_prod) 35 if (g->ops.clock_gating.slcg_priring_load_gating_prod)
@@ -53,7 +54,7 @@ void gk20a_priv_ring_isr(struct gk20a *g)
53 u32 gpc; 54 u32 gpc;
54 u32 gpc_stride = nvgpu_get_litter_value(g, GPU_LIT_GPC_STRIDE); 55 u32 gpc_stride = nvgpu_get_litter_value(g, GPU_LIT_GPC_STRIDE);
55 56
56 if (g->is_fmodel) 57 if (nvgpu_is_enabled(g, NVGPU_IS_FMODEL))
57 return; 58 return;
58 59
59 status0 = gk20a_readl(g, pri_ringmaster_intr_status0_r()); 60 status0 = gk20a_readl(g, pri_ringmaster_intr_status0_r());
diff --git a/drivers/gpu/nvgpu/gk20a/therm_gk20a.c b/drivers/gpu/nvgpu/gk20a/therm_gk20a.c
index b700c735..00159fae 100644
--- a/drivers/gpu/nvgpu/gk20a/therm_gk20a.c
+++ b/drivers/gpu/nvgpu/gk20a/therm_gk20a.c
@@ -16,6 +16,8 @@
16 * along with this program. If not, see <http://www.gnu.org/licenses/>. 16 * along with this program. If not, see <http://www.gnu.org/licenses/>.
17 */ 17 */
18 18
19#include <nvgpu/enabled.h>
20
19#include "gk20a.h" 21#include "gk20a.h"
20 22
21#include <nvgpu/hw/gk20a/hw_gr_gk20a.h> 23#include <nvgpu/hw/gk20a/hw_gr_gk20a.h>
@@ -123,7 +125,7 @@ int gk20a_elcg_init_idle_filters(struct gk20a *g)
123 active_engine_id = f->active_engines_list[engine_id]; 125 active_engine_id = f->active_engines_list[engine_id];
124 gate_ctrl = gk20a_readl(g, therm_gate_ctrl_r(active_engine_id)); 126 gate_ctrl = gk20a_readl(g, therm_gate_ctrl_r(active_engine_id));
125 127
126 if (g->is_fmodel) { 128 if (nvgpu_is_enabled(g, NVGPU_IS_FMODEL)) {
127 gate_ctrl = set_field(gate_ctrl, 129 gate_ctrl = set_field(gate_ctrl,
128 therm_gate_ctrl_eng_delay_after_m(), 130 therm_gate_ctrl_eng_delay_after_m(),
129 therm_gate_ctrl_eng_delay_after_f(4)); 131 therm_gate_ctrl_eng_delay_after_f(4));
diff --git a/drivers/gpu/nvgpu/gm20b/gr_gm20b.c b/drivers/gpu/nvgpu/gm20b/gr_gm20b.c
index e7b6fa85..82c587f9 100644
--- a/drivers/gpu/nvgpu/gm20b/gr_gm20b.c
+++ b/drivers/gpu/nvgpu/gm20b/gr_gm20b.c
@@ -19,6 +19,7 @@
19 19
20#include <nvgpu/kmem.h> 20#include <nvgpu/kmem.h>
21#include <nvgpu/log.h> 21#include <nvgpu/log.h>
22#include <nvgpu/enabled.h>
22 23
23#include "gk20a/gk20a.h" 24#include "gk20a/gk20a.h"
24#include "gk20a/gr_gk20a.h" 25#include "gk20a/gr_gk20a.h"
@@ -745,7 +746,7 @@ static int gr_gm20b_load_ctxsw_ucode(struct gk20a *g)
745 746
746 gk20a_dbg_fn(""); 747 gk20a_dbg_fn("");
747 748
748 if (g->is_fmodel) { 749 if (nvgpu_is_enabled(g, NVGPU_IS_FMODEL)) {
749 gk20a_writel(g, gr_fecs_ctxsw_mailbox_r(7), 750 gk20a_writel(g, gr_fecs_ctxsw_mailbox_r(7),
750 gr_fecs_ctxsw_mailbox_value_f(0xc0de7777)); 751 gr_fecs_ctxsw_mailbox_value_f(0xc0de7777));
751 gk20a_writel(g, gr_gpccs_ctxsw_mailbox_r(7), 752 gk20a_writel(g, gr_gpccs_ctxsw_mailbox_r(7),
diff --git a/drivers/gpu/nvgpu/gm20b/hal_gm20b.c b/drivers/gpu/nvgpu/gm20b/hal_gm20b.c
index 33198c23..f5328f03 100644
--- a/drivers/gpu/nvgpu/gm20b/hal_gm20b.c
+++ b/drivers/gpu/nvgpu/gm20b/hal_gm20b.c
@@ -39,6 +39,7 @@
39#include "hal_gm20b.h" 39#include "hal_gm20b.h"
40 40
41#include <nvgpu/bug.h> 41#include <nvgpu/bug.h>
42#include <nvgpu/enabled.h>
42 43
43#include <nvgpu/hw/gm20b/hw_proj_gm20b.h> 44#include <nvgpu/hw/gm20b/hw_proj_gm20b.h>
44#include <nvgpu/hw/gm20b/hw_fuse_gm20b.h> 45#include <nvgpu/hw/gm20b/hw_fuse_gm20b.h>
@@ -192,7 +193,7 @@ int gm20b_init_hal(struct gk20a *g)
192 gops->securegpccs = false; 193 gops->securegpccs = false;
193 gops->pmupstate = false; 194 gops->pmupstate = false;
194#ifdef CONFIG_TEGRA_ACR 195#ifdef CONFIG_TEGRA_ACR
195 if (g->is_fmodel) { 196 if (nvgpu_is_enabled(g, NVGPU_IS_FMODEL)) {
196 gops->privsecurity = 1; 197 gops->privsecurity = 1;
197 } else { 198 } else {
198 val = gk20a_readl(g, fuse_opt_priv_sec_en_r()); 199 val = gk20a_readl(g, fuse_opt_priv_sec_en_r());
@@ -204,7 +205,7 @@ int gm20b_init_hal(struct gk20a *g)
204 } 205 }
205 } 206 }
206#else 207#else
207 if (g->is_fmodel) { 208 if (nvgpu_is_enabled(g, NVGPU_IS_FMODEL)) {
208 gk20a_dbg_info("running ASIM with PRIV security disabled"); 209 gk20a_dbg_info("running ASIM with PRIV security disabled");
209 gops->privsecurity = 0; 210 gops->privsecurity = 0;
210 } else { 211 } else {
diff --git a/drivers/gpu/nvgpu/gm20b/ltc_gm20b.c b/drivers/gpu/nvgpu/gm20b/ltc_gm20b.c
index 84c3dfcd..791cc45b 100644
--- a/drivers/gpu/nvgpu/gm20b/ltc_gm20b.c
+++ b/drivers/gpu/nvgpu/gm20b/ltc_gm20b.c
@@ -18,6 +18,7 @@
18#include "gk20a/gk20a.h" 18#include "gk20a/gk20a.h"
19 19
20#include <nvgpu/timers.h> 20#include <nvgpu/timers.h>
21#include <nvgpu/enabled.h>
21#include <nvgpu/bug.h> 22#include <nvgpu/bug.h>
22 23
23#include <nvgpu/hw/gm20b/hw_mc_gm20b.h> 24#include <nvgpu/hw/gm20b/hw_mc_gm20b.h>
@@ -82,7 +83,7 @@ static int gm20b_ltc_init_comptags(struct gk20a *g, struct gr_gk20a *gr)
82 gk20a_dbg_info("max comptag lines : %d", 83 gk20a_dbg_info("max comptag lines : %d",
83 max_comptag_lines); 84 max_comptag_lines);
84 85
85 if (g->is_fmodel) 86 if (nvgpu_is_enabled(g, NVGPU_IS_FMODEL))
86 err = gk20a_ltc_alloc_phys_cbc(g, compbit_backing_size); 87 err = gk20a_ltc_alloc_phys_cbc(g, compbit_backing_size);
87 else 88 else
88 err = gk20a_ltc_alloc_virt_cbc(g, compbit_backing_size); 89 err = gk20a_ltc_alloc_virt_cbc(g, compbit_backing_size);
diff --git a/drivers/gpu/nvgpu/gp10b/hal_gp10b.c b/drivers/gpu/nvgpu/gp10b/hal_gp10b.c
index 133582cd..e2a931be 100644
--- a/drivers/gpu/nvgpu/gp10b/hal_gp10b.c
+++ b/drivers/gpu/nvgpu/gp10b/hal_gp10b.c
@@ -45,6 +45,7 @@
45#include "hal_gp10b.h" 45#include "hal_gp10b.h"
46 46
47#include <nvgpu/bug.h> 47#include <nvgpu/bug.h>
48#include <nvgpu/enabled.h>
48 49
49#include <nvgpu/hw/gp10b/hw_proj_gp10b.h> 50#include <nvgpu/hw/gp10b/hw_proj_gp10b.h>
50#include <nvgpu/hw/gp10b/hw_fuse_gp10b.h> 51#include <nvgpu/hw/gp10b/hw_fuse_gp10b.h>
@@ -197,7 +198,7 @@ int gp10b_init_hal(struct gk20a *g)
197 gops->clock_gating = gp10b_ops.clock_gating; 198 gops->clock_gating = gp10b_ops.clock_gating;
198 gops->pmupstate = false; 199 gops->pmupstate = false;
199#ifdef CONFIG_TEGRA_ACR 200#ifdef CONFIG_TEGRA_ACR
200 if (g->is_fmodel) { 201 if (nvgpu_is_enabled(g, NVGPU_IS_FMODEL)) {
201 gops->privsecurity = 0; 202 gops->privsecurity = 0;
202 gops->securegpccs = 0; 203 gops->securegpccs = 0;
203 } else if (g->is_virtual) { 204 } else if (g->is_virtual) {
@@ -215,7 +216,7 @@ int gp10b_init_hal(struct gk20a *g)
215 } 216 }
216 } 217 }
217#else 218#else
218 if (g->is_fmodel) { 219 if (nvgpu_is_enabled(g, NVGPU_IS_FMODEL)) {
219 gk20a_dbg_info("running simulator with PRIV security disabled"); 220 gk20a_dbg_info("running simulator with PRIV security disabled");
220 gops->privsecurity = 0; 221 gops->privsecurity = 0;
221 gops->securegpccs = 0; 222 gops->securegpccs = 0;
diff --git a/drivers/gpu/nvgpu/gp10b/ltc_gp10b.c b/drivers/gpu/nvgpu/gp10b/ltc_gp10b.c
index 165e93fe..5cf5a644 100644
--- a/drivers/gpu/nvgpu/gp10b/ltc_gp10b.c
+++ b/drivers/gpu/nvgpu/gp10b/ltc_gp10b.c
@@ -19,6 +19,7 @@
19#include "gm20b/ltc_gm20b.h" 19#include "gm20b/ltc_gm20b.h"
20 20
21#include <nvgpu/log.h> 21#include <nvgpu/log.h>
22#include <nvgpu/enabled.h>
22 23
23#include <nvgpu/hw/gp10b/hw_mc_gp10b.h> 24#include <nvgpu/hw/gp10b/hw_mc_gp10b.h>
24#include <nvgpu/hw/gp10b/hw_ltc_gp10b.h> 25#include <nvgpu/hw/gp10b/hw_ltc_gp10b.h>
@@ -102,7 +103,7 @@ static int gp10b_ltc_init_comptags(struct gk20a *g, struct gr_gk20a *gr)
102 gk20a_dbg_info("gobs_per_comptagline_per_slice: %d", 103 gk20a_dbg_info("gobs_per_comptagline_per_slice: %d",
103 gobs_per_comptagline_per_slice); 104 gobs_per_comptagline_per_slice);
104 105
105 if (g->is_fmodel) 106 if (nvgpu_is_enabled(g, NVGPU_IS_FMODEL))
106 err = gk20a_ltc_alloc_phys_cbc(g, compbit_backing_size); 107 err = gk20a_ltc_alloc_phys_cbc(g, compbit_backing_size);
107 else 108 else
108 err = gk20a_ltc_alloc_virt_cbc(g, compbit_backing_size); 109 err = gk20a_ltc_alloc_virt_cbc(g, compbit_backing_size);
diff --git a/drivers/gpu/nvgpu/gp10b/priv_ring_gp10b.c b/drivers/gpu/nvgpu/gp10b/priv_ring_gp10b.c
index 7cdbec5e..8aaa7bff 100644
--- a/drivers/gpu/nvgpu/gp10b/priv_ring_gp10b.c
+++ b/drivers/gpu/nvgpu/gp10b/priv_ring_gp10b.c
@@ -20,6 +20,7 @@
20 20
21#include <nvgpu/log.h> 21#include <nvgpu/log.h>
22#include <nvgpu/timers.h> 22#include <nvgpu/timers.h>
23#include <nvgpu/enabled.h>
23 24
24#include <nvgpu/hw/gp10b/hw_mc_gp10b.h> 25#include <nvgpu/hw/gp10b/hw_mc_gp10b.h>
25#include <nvgpu/hw/gp10b/hw_pri_ringmaster_gp10b.h> 26#include <nvgpu/hw/gp10b/hw_pri_ringmaster_gp10b.h>
@@ -34,7 +35,7 @@ static void gp10b_priv_ring_isr(struct gk20a *g)
34 u32 gpc; 35 u32 gpc;
35 u32 gpc_stride = nvgpu_get_litter_value(g, GPU_LIT_GPC_STRIDE); 36 u32 gpc_stride = nvgpu_get_litter_value(g, GPU_LIT_GPC_STRIDE);
36 37
37 if (g->is_fmodel) 38 if (nvgpu_is_enabled(g, NVGPU_IS_FMODEL))
38 return; 39 return;
39 40
40 status0 = gk20a_readl(g, pri_ringmaster_intr_status0_r()); 41 status0 = gk20a_readl(g, pri_ringmaster_intr_status0_r());
diff --git a/drivers/gpu/nvgpu/include/nvgpu/enabled.h b/drivers/gpu/nvgpu/include/nvgpu/enabled.h
new file mode 100644
index 00000000..5d30ba12
--- /dev/null
+++ b/drivers/gpu/nvgpu/include/nvgpu/enabled.h
@@ -0,0 +1,60 @@
1/*
2 * Copyright (c) 2017, NVIDIA CORPORATION. All rights reserved.
3 *
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms and conditions of the GNU General Public License,
6 * version 2, as published by the Free Software Foundation.
7 *
8 * This program is distributed in the hope it will be useful, but WITHOUT
9 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
10 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
11 * more details.
12 *
13 * You should have received a copy of the GNU General Public License
14 * along with this program. If not, see <http://www.gnu.org/licenses/>.
15 */
16
17#ifndef __NVGPU_ENABLED_H__
18#define __NVGPU_ENABLED_H__
19
20struct gk20a;
21
22#include <nvgpu/types.h>
23
24/*
25 * Available flags that describe what's enabled and what's not in the GPU. Each
26 * flag here is defined by it's offset in a bitmap.
27 */
28#define NVGPU_IS_FMODEL 1
29#define NVGPU_DRIVER_IS_DYING 2
30
31/*
32 * Must be greater than the largest bit offset in the above list.
33 */
34#define NVGPU_MAX_ENABLED_BITS 64
35
36/**
37 * nvgpu_is_enabled - Check if the passed flag is enabled.
38 *
39 * @g - The GPU.
40 * @flag - Which flag to check.
41 *
42 * Returns true if the passed @flag is true; false otherwise.
43 */
44bool nvgpu_is_enabled(struct gk20a *g, int flag);
45
46/**
47 * __nvgpu_set_enabled - Set the state of a flag.
48 *
49 * @g - The GPU.
50 * @flag - Which flag to modify.
51 * @state - The state to set the flag to.
52 *
53 * Set the state of the passed @flag to @state. This will return the previous
54 * state of the passed @flag.
55 */
56bool __nvgpu_set_enabled(struct gk20a *g, int flag, bool state);
57
58int nvgpu_init_enabled_flags(struct gk20a *g);
59
60#endif
diff --git a/drivers/gpu/nvgpu/tegra/linux/platform_gk20a_tegra.c b/drivers/gpu/nvgpu/tegra/linux/platform_gk20a_tegra.c
index a3b73cdf..96312a00 100644
--- a/drivers/gpu/nvgpu/tegra/linux/platform_gk20a_tegra.c
+++ b/drivers/gpu/nvgpu/tegra/linux/platform_gk20a_tegra.c
@@ -47,6 +47,7 @@
47 47
48#include <nvgpu/kmem.h> 48#include <nvgpu/kmem.h>
49#include <nvgpu/bug.h> 49#include <nvgpu/bug.h>
50#include <nvgpu/enabled.h>
50 51
51#include <nvgpu/linux/dma.h> 52#include <nvgpu/linux/dma.h>
52 53
@@ -120,7 +121,7 @@ int gk20a_tegra_secure_page_alloc(struct device *dev)
120 dma_addr_t iova; 121 dma_addr_t iova;
121 size_t size = PAGE_SIZE; 122 size_t size = PAGE_SIZE;
122 123
123 if (g->is_fmodel) 124 if (nvgpu_is_enabled(g, NVGPU_IS_FMODEL))
124 return -EINVAL; 125 return -EINVAL;
125 126
126 dma_set_attr(DMA_ATTR_NO_KERNEL_MAPPING, __DMA_ATTR(attrs)); 127 dma_set_attr(DMA_ATTR_NO_KERNEL_MAPPING, __DMA_ATTR(attrs));
@@ -401,7 +402,7 @@ static bool gk20a_tegra_is_railgated(struct device *dev)
401 struct gk20a_platform *platform = dev_get_drvdata(dev); 402 struct gk20a_platform *platform = dev_get_drvdata(dev);
402 bool ret = false; 403 bool ret = false;
403 404
404 if (!g->is_fmodel) 405 if (!nvgpu_is_enabled(g, NVGPU_IS_FMODEL))
405 ret = !tegra_dvfs_is_rail_up(platform->gpu_rail); 406 ret = !tegra_dvfs_is_rail_up(platform->gpu_rail);
406 407
407 return ret; 408 return ret;
@@ -419,7 +420,7 @@ static int gm20b_tegra_railgate(struct device *dev)
419 struct gk20a_platform *platform = dev_get_drvdata(dev); 420 struct gk20a_platform *platform = dev_get_drvdata(dev);
420 int ret = 0; 421 int ret = 0;
421 422
422 if (g->is_fmodel || 423 if (nvgpu_is_enabled(g, NVGPU_IS_FMODEL) ||
423 !tegra_dvfs_is_rail_up(platform->gpu_rail)) 424 !tegra_dvfs_is_rail_up(platform->gpu_rail))
424 return 0; 425 return 0;
425 426
@@ -483,7 +484,7 @@ static int gm20b_tegra_unrailgate(struct device *dev)
483 int ret = 0; 484 int ret = 0;
484 bool first = false; 485 bool first = false;
485 486
486 if (g->is_fmodel) 487 if (nvgpu_is_enabled(g, NVGPU_IS_FMODEL))
487 return 0; 488 return 0;
488 489
489 ret = tegra_dvfs_rail_power_up(platform->gpu_rail); 490 ret = tegra_dvfs_rail_power_up(platform->gpu_rail);
diff --git a/drivers/gpu/nvgpu/tegra/linux/platform_gp10b_tegra.c b/drivers/gpu/nvgpu/tegra/linux/platform_gp10b_tegra.c
index 84175e98..971ef66a 100644
--- a/drivers/gpu/nvgpu/tegra/linux/platform_gp10b_tegra.c
+++ b/drivers/gpu/nvgpu/tegra/linux/platform_gp10b_tegra.c
@@ -28,6 +28,7 @@
28 28
29#include <nvgpu/kmem.h> 29#include <nvgpu/kmem.h>
30#include <nvgpu/bug.h> 30#include <nvgpu/bug.h>
31#include <nvgpu/enabled.h>
31#include <nvgpu/hashtable.h> 32#include <nvgpu/hashtable.h>
32 33
33#include "clk.h" 34#include "clk.h"
@@ -78,7 +79,7 @@ int gp10b_tegra_get_clocks(struct device *dev)
78 struct gk20a_platform *platform = dev_get_drvdata(dev); 79 struct gk20a_platform *platform = dev_get_drvdata(dev);
79 unsigned int i; 80 unsigned int i;
80 81
81 if (g->is_fmodel) 82 if (nvgpu_is_enabled(g, NVGPU_IS_FMODEL))
82 return 0; 83 return 0;
83 84
84 platform->num_clks = 0; 85 platform->num_clks = 0;
diff --git a/drivers/gpu/nvgpu/vgpu/vgpu.c b/drivers/gpu/nvgpu/vgpu/vgpu.c
index 248d2a1b..a88d9e09 100644
--- a/drivers/gpu/nvgpu/vgpu/vgpu.c
+++ b/drivers/gpu/nvgpu/vgpu/vgpu.c
@@ -21,6 +21,7 @@
21 21
22#include <nvgpu/kmem.h> 22#include <nvgpu/kmem.h>
23#include <nvgpu/bug.h> 23#include <nvgpu/bug.h>
24#include <nvgpu/enabled.h>
24 25
25#include "vgpu/vgpu.h" 26#include "vgpu/vgpu.h"
26#include "vgpu/fecs_trace_vgpu.h" 27#include "vgpu/fecs_trace_vgpu.h"
@@ -581,14 +582,20 @@ int vgpu_probe(struct platform_device *pdev)
581 return -ENOMEM; 582 return -ENOMEM;
582 } 583 }
583 584
585 nvgpu_kmem_init(gk20a);
586
587 err = nvgpu_init_enabled_flags(gk20a);
588 if (err) {
589 kfree(gk20a);
590 return err;
591 }
592
584 gk20a->dev = dev; 593 gk20a->dev = dev;
585 if (tegra_platform_is_linsim() || tegra_platform_is_vdk()) 594 if (tegra_platform_is_linsim() || tegra_platform_is_vdk())
586 gk20a->is_fmodel = true; 595 __nvgpu_set_enabled(gk20a, NVGPU_IS_FMODEL, true);
587 596
588 gk20a->is_virtual = true; 597 gk20a->is_virtual = true;
589 598
590 nvgpu_kmem_init(gk20a);
591
592 priv = nvgpu_kzalloc(gk20a, sizeof(*priv)); 599 priv = nvgpu_kzalloc(gk20a, sizeof(*priv));
593 if (!priv) { 600 if (!priv) {
594 kfree(gk20a); 601 kfree(gk20a);