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-rw-r--r--drivers/gpu/nvgpu/gk20a/tsg_gk20a.c31
-rw-r--r--include/uapi/linux/nvgpu.h4
2 files changed, 34 insertions, 1 deletions
diff --git a/drivers/gpu/nvgpu/gk20a/tsg_gk20a.c b/drivers/gpu/nvgpu/gk20a/tsg_gk20a.c
index 0eaa23ab..40c871ce 100644
--- a/drivers/gpu/nvgpu/gk20a/tsg_gk20a.c
+++ b/drivers/gpu/nvgpu/gk20a/tsg_gk20a.c
@@ -25,6 +25,9 @@
25#include "gk20a.h" 25#include "gk20a.h"
26#include "hw_ccsr_gk20a.h" 26#include "hw_ccsr_gk20a.h"
27 27
28#define NVGPU_TSG_MIN_TIMESLICE_US 1000
29#define NVGPU_TSG_MAX_TIMESLICE_US 50000
30
28static void gk20a_tsg_release(struct kref *ref); 31static void gk20a_tsg_release(struct kref *ref);
29 32
30bool gk20a_is_channel_marked_as_tsg(struct channel_gk20a *ch) 33bool gk20a_is_channel_marked_as_tsg(struct channel_gk20a *ch)
@@ -345,6 +348,20 @@ static int gk20a_tsg_set_runlist_interleave(struct tsg_gk20a *tsg, u32 level)
345 return ret ? ret : g->ops.fifo.update_runlist(g, 0, ~0, true, true); 348 return ret ? ret : g->ops.fifo.update_runlist(g, 0, ~0, true, true);
346} 349}
347 350
351static int gk20a_tsg_set_timeslice(struct tsg_gk20a *tsg, u32 timeslice)
352{
353 struct gk20a *g = tsg->g;
354
355 if (timeslice < NVGPU_TSG_MIN_TIMESLICE_US ||
356 timeslice > NVGPU_TSG_MAX_TIMESLICE_US)
357 return -EINVAL;
358
359 gk20a_channel_get_timescale_from_timeslice(g, timeslice,
360 &tsg->timeslice_timeout, &tsg->timeslice_scale);
361
362 return g->ops.fifo.update_runlist(g, 0, ~0, true, true);
363}
364
348static void release_used_tsg(struct fifo_gk20a *f, struct tsg_gk20a *tsg) 365static void release_used_tsg(struct fifo_gk20a *f, struct tsg_gk20a *tsg)
349{ 366{
350 mutex_lock(&f->tsg_inuse_mutex); 367 mutex_lock(&f->tsg_inuse_mutex);
@@ -554,6 +571,20 @@ long gk20a_tsg_dev_ioctl(struct file *filp, unsigned int cmd,
554 break; 571 break;
555 } 572 }
556 573
574 case NVGPU_IOCTL_TSG_SET_TIMESLICE:
575 {
576 err = gk20a_busy(g->dev);
577 if (err) {
578 gk20a_err(dev_from_gk20a(g),
579 "failed to host gk20a for ioctl cmd: 0x%x", cmd);
580 return err;
581 }
582 err = gk20a_tsg_set_timeslice(tsg,
583 ((struct nvgpu_timeslice_args *)buf)->timeslice_us);
584 gk20a_idle(g->dev);
585 break;
586 }
587
557 default: 588 default:
558 gk20a_err(dev_from_gk20a(g), 589 gk20a_err(dev_from_gk20a(g),
559 "unrecognized tsg gpu ioctl cmd: 0x%x", 590 "unrecognized tsg gpu ioctl cmd: 0x%x",
diff --git a/include/uapi/linux/nvgpu.h b/include/uapi/linux/nvgpu.h
index 9f4bf43c..b8bd21f2 100644
--- a/include/uapi/linux/nvgpu.h
+++ b/include/uapi/linux/nvgpu.h
@@ -467,11 +467,13 @@ struct nvgpu_gpu_get_gpu_time_args {
467 _IOWR(NVGPU_TSG_IOCTL_MAGIC, 7, struct nvgpu_event_id_ctrl_args) 467 _IOWR(NVGPU_TSG_IOCTL_MAGIC, 7, struct nvgpu_event_id_ctrl_args)
468#define NVGPU_IOCTL_TSG_SET_RUNLIST_INTERLEAVE \ 468#define NVGPU_IOCTL_TSG_SET_RUNLIST_INTERLEAVE \
469 _IOW(NVGPU_TSG_IOCTL_MAGIC, 8, struct nvgpu_runlist_interleave_args) 469 _IOW(NVGPU_TSG_IOCTL_MAGIC, 8, struct nvgpu_runlist_interleave_args)
470#define NVGPU_IOCTL_TSG_SET_TIMESLICE \
471 _IOW(NVGPU_TSG_IOCTL_MAGIC, 9, struct nvgpu_timeslice_args)
470 472
471#define NVGPU_TSG_IOCTL_MAX_ARG_SIZE \ 473#define NVGPU_TSG_IOCTL_MAX_ARG_SIZE \
472 sizeof(struct nvgpu_event_id_ctrl_args) 474 sizeof(struct nvgpu_event_id_ctrl_args)
473#define NVGPU_TSG_IOCTL_LAST \ 475#define NVGPU_TSG_IOCTL_LAST \
474 _IOC_NR(NVGPU_IOCTL_TSG_SET_RUNLIST_INTERLEAVE) 476 _IOC_NR(NVGPU_IOCTL_TSG_SET_TIMESLICE)
475 477
476 478
477/* 479/*